United Business Media EE Times


Search

HOMEMARKET INTELLIGENCE UNITFORUMSDESIGNNEW PRODUCTSCAREERSBLOGSCONTACTEVENTSSIGN UP!RSSMost Popular contentTrusted Sources

 

Printed programmable logic startup secures support
Print this article Email this article Reprints RSS Digital Edition

Page 1 of 2
EE Times


LONDON — Nano ePrint Ltd., a spin off from the University of Manchester in England, has secured a grant to help it demonstrate a printed programmable logic device.

The grant, awarded by the Northwest Regional Development Agency (NWDA), is set to provide £234,000 (about $390,000) of funding towards a £390,000 (about $650,000) project to create a technology demonstration.

Nano ePrint was established as a spin-out from The University of Manchester's School of Electrical & Electronic Engineering in 2006. The company is attempting to commercialize a printable, programmable nanoelectronic platform developed by Professor Aimin Song, who serves the company as chief technology officer.

Nano ePrint (Manchester, England) is working mainly with metallic oxides, such as zinc oxide and derivatives, as the semiconductor material and PET film as the flexible substrate, CEO Scott White told EE Times. The company makes use of embossing or stamping (nano-imprint lithography) to create planar transistors and diodes. The company claims that its nano-scale devices achieve 10 times performance and 100 times the density of conventional printed electronics.

The embossing technique can fashion patterns down to a few nanometer geometry. Nano ePrint has created test structures at 100-nm but intends to manufacture at geometries of 200 to 300-nm, according to White.

This printing process is compatible with roll-to-roll methods. Nano ePrint is proposing to stamp out diodes and transistors in the semiconductor layer itself with side gates as necessary. Such structures therefore for do not require dielectric materials, or conductive contacts for source, drain and gate. For relatively simple circuits or functional units, such as logic gates and basic analog blocks, the interconnect between adjacent devices can be achieved directly within the semiconductor layer. For more complex circuits, a separate conductive interconnect layer may still be required.



Page 2: Related links and articles

Page 1 2




  Free Subscription to EE Times
First Name Last Name
Company Name Title
Email address
  Click here for your Free Subscription to EETimes Europe
 
CAREER CENTER
Looking for a new job?
SEARCH JOBS
SPONSOR

RECENT JOB POSTINGS
CAREER NEWS
DoD Recognizes University Scientists For Basic Research
Annual awards to university faculty to conduct next-generation research projects were announced this week by the Defense Department.

For more great jobs, career related news, features and services, please visit EETimes' Career Center.



All White Papers »   

 
Education and
Learning


Learn Now:












Home | About | Editorial Calendar | Feedback | Subscriptions | Newsletter | Media Kit | Contact | Reprints|  RSS|   Digital|  Mobile
Network Websites
International
Network Features




All materials on this site Copyright © 2010 TechInsights, a Division of United Business Media LLC All rights reserved.
Privacy Statement | Terms of Service | About