AMD and archrival Intel Corp. are both racing to deliver 32nm processors with integrated graphics. Neither company has described the cores they will use, leaving open questions about who will win or lose in the first generation merged products.

How the programming model evolves for such mixed multicore processors will be key. AMD dropped hints it is quietly lobbying for a new approach it thinks could give its chips a strategic advantage.

On the hardware side, Bobcat is a synthesizable, low power x86 core AMD will pit against Intel's custom Atom design. Bobcat could deliver about 90 percent of the performance of today's mainstream notebook chips at half their size, outperforming Atom.

Bobcat has an out-of-order execution pipeline, capable of issuing two-instructions per clock cycle and—unlike Atom--sports aggressive branch prediction. The first versions of the core will consume about 2W max, but be capable of running at less than a Watt.

Bulldozer is a high performance core that merges an optimized set of the functions of two x86 cores into a single silicon block. It has two separate integer units with separate L1 and L2 caches, but the cores share a common L3 cache and an enhanced floating point unit.

The floating point unit includes two 128-bit multiply-accumulate (FMAC) units. "That is the most commonly used instruction in a floating point unit and this is the first x86 to have dedicated hardware for it," said Chuck Moore, an AMD fellow who started the Bulldozer design team about three years ago.

Bulldozer is a full custom design, optimized for maximum data rates at a given power consumption level. First parts using it will be desktop and server CPUs made in a 32nm silicon-on-insulator process supporting high-K metal gates.

Both new cores support the full x86 instruction set. Bulldozer adds new extensions for its FMAC.