At one time, IC packages were simple, cheap commodities for analog and logic. More recently, however, chip makers and OEMs must now make some difficult choices in IC packaging types. There are a plethora of IC packaging types, each with a set of trade-offs.

Chip-packaging is becoming a key differentiator for new and emerging analog designs, said Taylor Efland, chief technologist for power analog products and senior fellow at Texas Instruments Inc., during a presentation at the Analog Semiconductor Leaders' Forum 2009 here. The forum was sponsored by Dongbu HiTek.

''Packaging development is a big deal,'' Efland told EE Times. ''It's getting very complicated.''

Packaging is a critical part of TI's strategy. In fact, TI recently expanded its IC-assembly and test operations in the Philippines by building a new plant at a cost of $1 billion. The plant is now in production.

On the product front, take a 6 Amp, 20-V buck regulator based on 0.72-micron technology. A buck regulator, sometimes called a buck convertor, is a DC-to-DC step-down power supply.

The same device at 0.35-micron must also operate at 20 volts, but at these geometries, the part also represents a fivefold reduction in die size.

In other words, the package size decreases, but ''power density is going up,'' he said. The challenge is to ''get rid of the thermal density out of the package.''

There are even more thermal-density challenges in moving this type of device to 180-nm technology. To solve the problem, TI is working on several fronts. ''We spend a lot of time on packaging metallurgy,'' he said. ''We spend a lot of time on simulation.''

At TI (Dallas), the company makes use of various packages for analog, including wafer-level chip-scale packaging (CSP) and QFN. TI devises its own CSP technology. ''Quad Flat No-Lead (QFN) is a leadless package with peripheral terminal pads, and an exposed die pad for mechanical and thermal integrity. The package can be either square or rectangular,'' according to TI's Web site.

TI is the leader in analog in terms of share. As recently reported, TI plans to open a 300-mm analog semiconductor fab in Richardson, Texas. At the same time, the company also outlined its roadmap for mainstream analog processes and tipped a new 130-nm technology based on copper interconnects.