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On Semi rolls 180-nm CMOS foundry process
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EE Times


SANTA CLARA, Calif. -- On Semiconductor Inc. has expanded its foundry capabilities with the launch of a new 0.18-micron CMOS process technology.

The ONC18 process is an ideal platform for developing ASICs for the automotive, industrial and medical applications. The ''on-shore'' nature of the technology is also ideal for the military and related markets, said Kirk Peterson, North American foundry manager for On Semiconductor.

The ONC18-based solutions will be manufactured at the company's 8-inch wafer fabrication facility in Gresham, Ore.

Suitable for ASICs requiring up to 10 million gates, the ONC18 process features between four and six levels of metal and allows designers to integrate 1.8 volts (V) core voltage with 1.8 V and 3.3 V input/output (I/O).

Gate densities and power consumptions for high density core and mixed signal core cells are 124 K gates/mm2 and 46 microwatt per megahertz per gate and 120 K gates/mm2 and 28 W/MHz/gate, respectively.

Memory options include 1.1 M bit synchronous single port and 512K bit dual port SRAM and 1.1M bit high-density, low-leakage VIA-programmable ROM.






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