PORTLAND, Ore. — Graphene could carry nearly 1,000 times more current and operate at temperatures more than 10 times cooler than conventional copper interconnects below 22-nanometer line widths, according to researchers at the Georgia Institute of Technology.

The speed (electron mobility) of graphene has been touted as better than copper, but the Georgia Tech data on nanoribbons as small as 16 nm quantifies just how superior carbon is compated to copper. Graphene nanoribbons tested could carry as much as 10 billion amps/CM, or nearly 1,000 times greater than copper.

"No one had measured graphene's current carrying capacity before this," claimed Raghunath Murali, a senior research engineer in Georgia Tech's Nanotechnology Research Center. "One possible reason that this property of graphene was not touted before is that there were no experimental results until our work."

The superior current-carrying capability of carbon integrated into graphene nanoribbons also showed less heat build up since carbon's thermal conductivity is much higher than copper. Nanoribbons have a thermal conductivity of 1,000-5,000 watts per meter Kelvin--ten times greater than copper. The Georgia Tech researchers also claimed that graphene nanoribbons will mitigate electromigration, a growing problem for copper as line widths descend to the nanoscale.

"If the current carried through a wire is close to the current-carrying capacity of the wire, then the chances of electromigration are greater than if the current in the wire is much smaller than the current-carrying capacity," said Murali. "Graphene has over two orders of magnitude greater capacity than copper, thus, if a graphene wire is compared to a copper wire carrying the same current, then the graphene wire will better resist electromigration."

Three hurdles remain to commercialization of carbon interrconnects, according to the researchers: perfecting methods of growing monolayers of graphene over entire wafers (since only centimeter-sized areas can be easiliy grown in monolayers); fabricating vias to interrconnect graphene nanowires; and integration of carbon into the back-end of the CMOS manufacturing process.