SAN FRANCISCOSynopsys Inc. Monday (July 20) introduced a new capability to accelerate design closure earlier in the design flow and an new IP product said to reduce power consumption in datapath logic.
The In-Design Rail Analysis, part of Synopsys' IC Compiler in-design ecosystem, utilizes embedded PrimeRail analysis and fixing guidance technology to enable designers to perform power network verification throughout physical implementation, according to Synopsys (Mountain View, Calif.).
Identifying and fixing voltage-drop and electromigration issues earlier in the design flow will help designers to eliminate costly iterations late in the design process, Synopsys said. In-Design Rail Analysis helps IC Compiler users ensure the integrity of their power network early and frequently during the physical implementation process, avoiding late-stage surprises close to tapeout, the company said. It also works in tandem with IC Compiler's PNS capability to enable designers to efficiently implement, optimize and refine power networks, reducing overdesign, Synopsys said.
In-Design Rail Analysis is available immediately, Synopsys said. IC Compiler customers can use the new technology by purchasing PrimeRail licenses, the company said. Existing IC Compiler customers who already have PrimeRail licenses have access to the technology free of charge by downloading the latest release, the company said.
Also Monday, Synopsys announced a new IP product, DesignWare minPower Components, to make up part of its Eclypse low power solution. The IP reduce power in datapath logic compared to traditional power optimization methods, enabling power reduction of up to 48 percent in datapath logic, Synopsys said. The components are scheduled for general availability in the third quarter, the company said.