Octeon II uses an upgraded version of Cavium's custom cnMIPS64 core, doubling from 16 to 32 the maximum number available in one chip. The core adds a number of new instructions and includes support for the 3G Snow algorithm used in 3G cellular networks. The core now runs at maximum data rates of 1.5 GHz, up from 900 MHz.

The chip now supports serial RapidIO to link to banks of DSP typically used in wireless base stations. It also upgrades support from DDR2 to DDR3 memory and from 2.5 to 5.0 GHz PCI Express. Xaui ports are also boosted from 3.125 to 6.25 GHz.

The chip also boosts the maximum number of hardware accelerators on board from 24 to 75. Power consumption for the chips ranges from 7 to 17W.

The first version of the Octeon II to ship will be the CN63XX, a two-to-six core devices with 2 Mbytes L2 cache. Cavium ultimately plans to ship lower and higher end parts.

The CN63XX will sell for prices ranging from $59-199 depending on configuration in 10,000 unit quantities. The company does not expect to sample the chip until late this year.

Companies including Brocade, Cisco Systems, IBM, Juniper Networks use first-gen Octeon parts today in a wide range of systems including routers, switches, appliances, and storage arrays.

The chip will compete with embedded processors from Freescale as well as a new line of processors from LSI Corp. geared for wireless systems.