MANHASSET, N.Y. — Jasper Design Automation said it is automating IC design verification routines with a new suite of tools.

Jasper's ActiveDesign with Behavioral Indexing is an IC design tool that is billed as enabling design engineers to capture and preserve intended design behavior as it is being implemented.

The design tool uses formal analysis to automatically produce waveforms from the register transfer level (RTL). Behavioral indexing technology enables Jasper's tool to iteratively extract, index and store relevant design behavior, along with the RTL, in an executable database.

"Engineers have been looking for new technologies to increase the quality of their work prior to handoff to the verification teams, but without the overhead of developing their own test bench," Jasper CEO Kathryn Kranen said in a statement. "The response from pre-production customers has been excellent, highlighting the real need for greater automation during RTL development."

Jasper (Mountain View, Calif.) recently raised $7 million in series D financing led by a new investor, ZenShin Capital (Menlo Park, Calif.). Joining the funding round were existing investors: Accel Partners, Cambrian Ventures, Foundation Capital, InnovationsKapital and Northzone Ventures. The funds will be used to support Jasper's operations and continued product expansion.

ActiveDesign will be available worldwide in March, with list prices starting at $140,000.