The SyEna project (Synthesis-supported design of analog circuits) focuses on automatable design methodologies. While state of the art in digital circuit design, these methodologies have yet to be adopted in the analog realm, explained a spokesperson of EDAcentrum research center (Hannover, Germany) which coordinates the project. The methodologies in question embrace the entire value chain from writing the specs to manufacturing.

Since the automation, in particular the automatic topology synthesis aimed at in the project, will greatly decrease the number of errors in analog circuitry, the reliability of the chips is expected to increase. Thus, the new design methodologies will enable products that can be used in safety critical applications such as automotive and medical electronics, the researchers believe.

"The project will lift analog design engineering quality and productivity to a new level", explained project coordinator Thomas Hoetzel, Chief Technology Officer of fabless chip vendor ZMD AG (Dresden, Germany). "Elementary things which already are used widely in digital design will become reality in analog design as well." Besides better reliability, designers also will benefit by faster time-to-market and reduced number of re-spins, Hoetzel hopes.

The SyEna project is based on an earlier project called Structural Synthesis of Analog Circuits (SAMS). Involved in the SynEa project are a relative large number of semiconductor vendors and research institutes including Fraunhofer IIS/EAS, Infineon Technologies, Northrop Grumman LITEF GmbH, Melexis, MunEDA GmbH, Bosch group, the Dresden Technical University and ZMD AG. Designed to run until September 2011, the project is funded by the German federal ministry of research and technology by a sum that adds up to the equivalent of 100 person-years, the EDAcentrum spokesperson said.