Chklovskii gave an invited talk entitled "Placement and routing optimization in the brain" at the International Symposium on Physical Design (ISPD) Tuesday (April 11). Using the concept of wiring optimization with respect to constraints and cost factors, he showed how researchers predicted the neuronal layout of the relatively simple brain of C. elegans, a small worm with 279 neurons.

"Many physical features of the brain can be viewed as solutions of constrained optimization," said Chklovskii. He noted two findings: that neuronal layout minimizes wiring length for any given connectivity, and that small, "noisy" synapses maximize information storage capacity per volume.

VLSI design techniques can help researchers understand how the brain works, Chklovskii said. The brain, he noted, sits between sensor inputs and motor outputs, which can be likened to the input/output pins of an IC. Signals come into the brain, are converted to electrical signals, and are propagated through a net of neurons connected by synapses.

But researchers cannot quantitatively model how the brain generates behavior, because they don't have a wiring diagram that shows what's connected to what, Chklovskii said. That's what led to his research work, which involves "circuit reconstructions" derived from slicing up brain tissue. "We're trying to reverse engineer systems to understand why things are as they are," he said.

By applying the concept of "constrained optimization" to the brain, Chklovskii said, it's possible to predict neuronal layout from a wiring diagram. His research accomplished that for the C. elegans nervous system using placement algorithms derived from IC design.

Just as IC wiring is guided by "costs," so is brain wiring, according to Chklovskii. In the brain, costs are generated because the neuronal connections take up valuable space, introduce delays, require material and metabolic energy, and rely on genetic information for guidance in development. Nature seeks to minimize these costs by keeping wire length short.

One advantage of C. elegans is that there are relatively few neurons, and most don't branch. There are, however, synaptic connections where wires touch. In order to predict the neuronal layout, Chklovskii's team modeled each neuron as a single straight wire with multiple synapses. One constraint is that synaptically connected wires must overlap.

Then researchers minimized the total wiring length, and minimized the cost function by using linear programming. To predict cell body positions, they calculated the synaptic center of mass for each neuron. A complete layout was created, and there was a close match between the actual and predicted positions of neuronal cell bodies.

There were, however, some difficulties in predicting the placement and clustering of neurons belonging to the tail ganglia. Extra circuits in the male C. elegans may account for the mismatch, Chklovskii said.

Cold Spring Harbor researchers are also examining memory storage in large neuronal networks, such as the human cerebral cortex. Most synapses, researchers found, are small and noisy. Stronger, larger synapses have higher signal-to-noise ratios, but they're expensive in terms of space. Thus, the small, noisy synapses maximize information storage capacity, although with some tradeoffs with respect to time delay, Chklovskii said.