Headlines and summaries from the pages of Electronic Engineering Times . Previous editions are available from the 1994 , 1995 , 1996 , 1997 , and 1998 News Archives.

Friday, September 20, 1996

Projects seek power saving at circuit level

Web-based net management finds support

Bill to ease encryption exports stalls

"Thin client" called threat to Wintel

Cadence, CCT end legal dispute

Thursday, September 19, 1996

VLSITechnology offers a new Vista for set-tops

Fujitsu Microelectronics revamps logic group

Multimedia braces for Mpact

Raytheon gets contract to update air traffic control equipment <

High-tech stocks not for high rollers only <

Wednesday, September 18, 1996

Solar-cell efficiency is improved

IEDM looks to system-on-a-chip

Micromotor geared for practical applications

'Future scientists' funded

Westchester County is bringing technology to the 'burbs

Minority groups seek strength in numbers

Tuesday, September 17, 1996

Motorola tips '302 ISDN ICs

DVD group finishes Version 1.0 spec

PCI stands out at show

Ascom pitches ATM optic ring

Designers overcoming flip-chip obstacles

Monday, September 16, 1996

ATM silicon attacks Internet bottlenecks

Heat rises in Cadence vs. Avant! lawsuit

Synopsys ups ante in verificatio n

Sonet transport catches a wave toward terabit rates

Lucent's DSP first to execute 100 Mips

Friday, September 20, 1996

Projects seek power saving at circuit level

FREMONT, Calif. -- The pursuit of power efficiency, having already explored voltage reductions and clock-gating, is moving to logic-gate structures and even to the design of the transistors themselves. Recent announcements from vendors as diverse as microcontroller-peripheral specialist WSi here and ASIC powers IBM Microelectronics and Texas Instruments show the effort proceeding along all three fronts.

The most straightforward approach is illustrated by the Timeline ASIC process now in beta at Texas Instruments. Timeline is a 0.2-ý (drawn) CMOS process that is just emerging from the laboratory for use by a few beta-level customers. Given the process's ability to produce dice with upward of100 million transistors, this power project is an important issue.

With its tiny gate dimensions, Timeline has a simple approach to power reduction--tiny operating voltages.

Another approach was discussed last week by IBM Microelectronics in its CMOS 5S Enhancements announcements. IBM's 5S process--which has been in production for some time now--uses much--larger gate dimensions than the new TI formula, at 0.35 ý after the enhancements. It also runs at a more conventional 3.3 V. But it benefits from a very fine metal pitch and an even-finer pitch in its local interconnect layer.

That has allowed IBM to develop a set of low-drive, very low-power logic cells. "With the local interconnect, we can use extremely small transistor sizes yet still have metal-1 unblocked and able to do short interconnect runs," said applications engineer Larry Wissel. Another vendor with an entirely different set of constraints has taken an entirely different approach. WaferScale Integration Inc. makes inte grated peripheral chips for use with microcontrollers. The company does full-custom design in a workhorse, 5-V process with no option to use tiny transistors or tiny voltages. But they only have to keep up with a microcontroller, so they don't need 200 MHz speed.

Faced with those constraints, WSi has taken a quite radical approach to power conservation. Along with the usual clock-gating, cycling of power in sense amps and the like, the company has developed its own differential pass-transistor logic.

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Web-based net management finds support

ATLANTA -- Several companies at last week's Networld+Interop show put some muscle behind the ill-defined plans for network-management systems based on distributed Web schemes, most using downloadable Java applets. Expanding on proprietary early efforts from internetworking vendors like Sahara and UB Networks, the initiati ves also bow to moves at Java's originator, Sun Microsystems Inc., and its SunSoft subsidiary.

Epilogue Technology Corp., the protocol-stack specialist recently acquired by Integrated Systems Inc. (Sunnyvale, Calif.), unveiled its Decorum concepts for Web-based polling of Simple Network Management Protocol (SNMP) nodes. SunSoft, meanwhile, updated its Solstice Enterprise Management system and touted the work of several partners in a special demo at the Fox Theatre in downtown Atlanta. Perhaps the most innovative concept among the Solstice/Java group came from Cisco Systems Inc., which proposed a new syntax for describing SNMP nodes called MOJO, or Management Over Java Objects.

The internetworking and network-management specialists are building on work by a loose coalition of vendors who plan to move to Web-based management platforms. In July, Compaq Computer, Intel, Cisco and several other partners announced an enterprise-management group to devise a "schema" that operates between a browser and a management-services layer. Inspired by ideas developed by the Internet Engineering Task Force, this software layer would access data files from existing management protocols, including SNMP and the Desktop Management Interface.

Last week, vendors responded to complaints that such efforts have been ill-defined for lower layers in the protocol stack. The most concrete attempt to reconcile transport protocols and Web-based management came from Epilogue (Albuquerque, N.M.), which is bringing a patent-pending technology for SNMP-HTML translation to standards bodies such as the IETF.

Cisco, too, is sticking with the existing SNMP installed base with MOJO, which allows SNMP MIB information to be viewed and modified through downloadable Java applets.

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Bill to ease encryption exports stalls

WASHINGTON -- Congressional attempts to roll back export restric tions on encryption technology are facing so much White House resistance that observers said the proposed legislation may be dead for this year.

The Clinton administration, which is promoting a key-escrow approach favored by law enforcement, is expected to take its case to a meeting of the Organization for Economic Cooperation and Development (OECD) in Paris this week. Observers here said administration officials will attempt to use the meeting to build international support for escrowed encryption.

Meanwhile, the White House has apparently succeeded in blocking a Senate bill that would have allowed unrestricted export of mass-market or public-domain encryption programs. The Senate Commerce Committee had scheduled a vote on S.1726--also known as the Promotion of Commerce Online in the Digital Era (Pro-CODE) bill--on Sept. 12. But bowing to pressure from the White House and Sen. James Exon, D-Neb., the committee postponed a vote. Sen. Conrad Burns, R-Mont., chief sponsor of the legislation, said last w eek in a letter distributed on the Internet that he still wanted to mark up the bill. However, sources here said the bill may be dead for this session.

The Clinton administration is expected to propose its own encryption legislation in the next few weeks. So far, administration officials have only said they are considering looser export restrictions on encryption technology.

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"Thin client" called threat to Wintel

MILTON KEYNES, U.K. -- A new report predicts that Microsoft Corp. and Intel Corp. face uncertain futures thanks to the rapid evolution of Internet-based computing models.

The report by Bloor Research Group said the corporate computing world is evolving toward a centralized-network computing model that will be spearheaded by stripped-down inexpensive PCs called "thin clients," which will replace Windows PCs. These clients will link the machines into p arallel-processing computers in a client/server relationship, running applications across a Web-compliant environment.

At the center of the earthquake will be Java, the programming language from Sun Microsystems Inc., the report said. Java will turn the Web into a vast network for client/server operation, it said.

Microsoft's software monopoly will erode, and Intel processor prices will plummet because "the thin client does not need Intel." Chips used in thin clients will be cheaper and easier to program than Intel's current microprocessors, the report said.

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Cadence , CCT end legal dispute

SAN JOSE, Calif. -- Cadence Design Systems Inc. and Cooper & Chyan Technology Inc. (CCT) have embarked on a new relationship after settling their legal squabble earlier this month.

Cadence had sued CCT for selling an allegedly unauthorized interface between CCT's IC Craftsman and Cadence's IC layout tool called Virtuoso. Under their settlement, CCT received the right to link its products with Cadence's IC tools under the Cadence Connections program for third-party software vendors. CCT had previously been a Connections partner for Cadence's printed-circuit-board tools.

Also as part of the agreement, Cadence will become a preferred services provider for CCT tools.

"We're trying very hard not to say who was right and who was wrong," said Bill Portelli, vice president of marketing for CCT (Cupertino, Calif.). "We have a relationship between our two companies that is stronger than it was before." <

Thursday, September 19, 1996

VLSI Technology offers a new Vista for set-tops

SAN JOSE, Calif. -- After updating its ARM/Thumb RISC architecture for embedded set-top applications this week, VLSI Technology Inc. next week will unveil a next-generation set-top arc hitecture. It incorporates network interface-modulation technology, RISC-based system controllers with embedded MPEG-2 transport demultiplexers and MPEG-2 audio/video decoder devices.

Vista, or VLSI Integrated Set-Top Architecture, is intended for applications in existing and emerging digital-video-broadcast systems, future digital-cable systems and even digital video disk systems for TVs and consumer appliances.

Many of the building blocks for Vista were present when VLSI snared a raft of design wins in U.S. DirecTv and European Canal+ set-top designs. But in linking modulation, transport and decompression products under one umbrella, VLSI is setting the stage for a 1997 two-chip solution using standard products, moving eventually to a single-chip set-top architecture based on a 0.25-micron ASIC process.

The Vista rollout began a week ago with the introduction of a cached 32-bit ARM core capable of supporting a 16-bit Thumb mode. The VYF86C703T ARM/Thumb functional system block will form t he heart of many system-controller designs.

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Fujitsu Microelectronics revamps logic group

SAN JOSE, Calif. -- Fujitsu Microelectronics Inc. (FMI), which has shuffled managers or reorganized several times in the past five years, has just hired a National Semiconductor Corp. executive to lead its logic operations.

Bami Bastani, who has a doctorate in engineering from Ohio State, was named executive vice president for the new System LSI Products Group here. Bastani, who spent 11 years at National, most recently as head of memory products and ASSPs at the Fairchild Semiconductor Group, reports to Ken Katashiba, president and chief executive officer of FMI.

Perhaps with some fits and starts, Katashiba has edged the company in recent years toward operating more like an American unit rather than a Japanese one, and in the process has encountered res istance from Tokyo.

The company has also moved to anchor its logic operations with a system-on-a-chip strategy, and has made other management moves in doing so.

Bastani plans to push aggressively into an ASIC-like business model that offers customers system-level large-scale integration with fast turnarounds and leading CMOS processes.

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Multimedia braces for Mpact

SUNNYVALE, Calif. -- The multimedia processor wars will heat up next week as Chromatic Research Inc. releases the Mpact media processor.

While personal computer makers have been using Mpact with beta software, Sept. 23 is the launch date for the initial production-capable version. The first PCs with Mpact probably won't be out until early next year, as OEMs will want to tailor Mpact to their own tastes, said David Wilt, marketing manager for Chromatic, based here.

T he Mpact chip itself is being manufactured by Toshiba America Electronic Components Inc. (Irvine, Calif.) and LG Semicon America Inc. (San Jose, Calif.), each of which owns a minority stake in privately held Chromatic. Both companies are due to announce shipments of silicon today.

Media processors aim to outperform DSPs by delivering multimedia functions faster and in a single chip. Chromatic is trying to sway OEMs by emphasizing that Mpact doesn't need to be programmed the way a DSP does. And unlike a DSP, Mpact can handle multiple functions at once, and functions can be altered or added with a simple software upgrade.

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Raytheon gets contract to update air traffic control equipment

WASHINGTON -- Raytheon Co. grabbed another big chunk of the U.S. air traffic control upgrade this week, winning a three-way competition to replace terminals and other tracking equipment used in airport control towers.

Federal Aviation Administration (FAA) officials said the upgrade, Standard Terminal Automation Replacement Systems (Stars), could be worth almost $1 billion. Stars terminals and other electronics will replace aging air-traffic control computers that are in many cases more than 20 years old. The new system will replace black-and-white radar screens with color displays and will provide controllers with more weather data.

Raytheon's Equipment Division (Marlborough, Mass.) said Stars will upgrade 331 terminal systems for the FAA and the Defense Department. The first terminals are scheduled to be installed at Boston's Logan International Airport and at Eglin Air Force Base, Fla. They are expected to be operational in December 1998. The entire Stars system is to be completed by 2007.

Stars will standardize air-traffic control systems at up to 172 FAA and 199 DoD facilities. The new terminals will provide air-traffic controllers with a radar data- processing display and modified flight data.

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High -tech stocks not for high rollers only

NEW YORK -- Lured by the promise of high earnings and aggressive growth, investors are buying more technology stocks today than any other type, and the investor base itself has grown increasingly diverse. In the main, analysts say, that's been good for the industry and the economy at large.

Underscoring high tech's investment appeal has been the strength with which technology stocks rebounded in recent weeks, logging the highest weekly gains in more than four months as investors cheered reports of solid economic growth, low inflation and an August increase in the semiconductor industry's book-to-bill ratio. Michael Murphy, editor of the California Tech Stock Letter (Half Moon Bay, Calif.), says he's seen a shift in the support base for technology stocks over the 26 years he's been tracking the market. In 1970, corporations and government agencies accounted for the bulk of investments. Now that computers and communications electronics have become consumer goods, more smaller investors "are interested in technology and investing in it."

The increased investment activity has accelerated the rate of change in sectors already known for their chameleon tendencies: communications, computers, the Internet, networking, semiconductors and software. The financial support lets companies pursue everything from plant and staff expansions to acquisitions and initial public offerings.

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Wednesday, September 18, 1996

Solar -cell efficiency is improved

ATLANTA -- Researchers at the Georgia Institute of Technology say they have pushed the efficiency of multicrystalline solar cells to record highs by finessing the process-sequencing steps and integrating the requisite technologies. The work unites two areas of development with an eye toward bringing down the cost to utilities of generating electrical power using photovoltaic (PV) technology.

In one technique, researchers optimized gettering and passivation techniques for multicrystalline silicon (mc-Si) -- a relatively low-quality semiconductor -- to nudge maximum conversion efficiency to 18.6 percent, a claimed record. The new process also integrates the cost-effective advantages of rapid thermal processing (RTP) with a simplified screen-printing process for defining metal contacts. Prototypes built with the low-cost process have shown efficiencies as high as 16.2 percent.

The researchers believe the manufacturing innovations will have a dramatic impact on the cost of solar cells. "The ultimate goal is to use a cheap, defective material, such as multicrystalline silicon, and low-cost manufacturing techniques without sacrificing performance," said Ajeet Rohatgi, who leads the project.

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IEDM looks to system-on-a-chip

SAN FRANCISCO -- This year's International Electron Devices Meeting (IEDM), to be held here in December, will kick off with a pair of sessions looking at the current state of emerging technologies, such as silicon-on-insulator, silicon carbide, gallium-nitride light emitters and microelectromechanical systems (MEMS).

In addition, Intel chairman Gordon Moore will review the intervening years between this meeting and the 1968 IEDM, when he served as plenary speaker.

Moore, who at about that time coined his prophetic law predicting the doubling of semiconductor density every year, is expected to revisit many of the issues surrounding circuit fabrication that he discussed in his original IEDM lecture. Controlling defects, refining process and dealing with exploding interco nnect have remained central themes in the electronics industry over the intervening years.

Though traditionally a forum for advanced-device research, IEDM is shifting into issues surrounding systems and interfaces with the real world, due mainly to the rapidly increasing density of chips and the advent of silicon processes such as microelectromechanical systems. The new capabilities are rapidly turning circuit designers into system engineers grappling with problems such as integrating mechanical and electrical components or incorporating power transistors with low-voltage electronics.

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Micromotor geared for practical applications

ALBUQUERQUE, N.M. -- Researchers at Sandia National Laboratory have completed a successful test of an on-chip micromachined, electrostatically actuated microengine that drives multiple gears.

The test is part of a program to build micromachined devices at an order-of-magnitude reduction in cost for use in defense applications. Able to support speeds of up to 200,000 revolutions per minute while driving multiple gears, the microengine may find application as a drive for micromachined devices in such areas as electrical and optical switches, micropositioners, medical tools and switching optical components.

While micromotor design is not new, previous technology could not be used for power take-off or to drive other microdevices, researchers at Sandia said. Also, components were not driven by on-chip actuators. "There were not any suitable drivers that we could use," said Ernest Garcia, a researcher at Sandia, based here. "We were looking for an output gear that would allow us to connect to a mechanical drive train." Developing an appreciable force over a practical distance has been a fundamental problem for micromachine technology and has limited its usefulness in practical applications. The current design may thus show microengineers a route to building complex micromachines that can perform useful tasks.

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'Future scientists' funded

Established five years ago, FSEA offers kids a series of planned projects designed to show how much fun there is in science and engineering. Most programs will take place after school, with a volunteer from industry working with a teacher to oversee the projects.

But founder George Westrom, an engineer, said adults have been cautioned to keep lectures and talking to a minimum. The goal is to give students "hands-on" opportunities to build boards, create models and implement what they've learned in math and scien ce.

One FSEA project is the Electric Game Board for elementary students. It calls for six sessions in which two-member teams build a game board with 10 questions and answers. An LED lights when the correct answer is connected to the question. The teams design and wire the board in addition to choosing questions and answers. "

At the high school level, a team of three builds a boat from card stock and uses it to float a predetermined number of marbles with the smallest possible amount of material. They must use math and physics in devising the ideal boat. Visit FSEA's present Web site (www.fsea.org).

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Westchester County is bringing technology to the 'burbs

While Silicon Valley is renowned as a place where even the dentist will take a stake in an engineer-patient's startup, Westchester County's financial institutions and businesses squint suspiciously upon anyone with the audacity to carve out a niche in technology. No money? No product? No employees? And you want a loan?! "This city and county are so out of it," declared Nancy Bordier.

Bordier is busy trying to rope them "into it" through the Eastview Technology Center, a technology incubator sheltered in a restored old mid-city school leased from the area school board.

At Eastview, some 40 entrepreneurs in multimedia, Internet services, networking and holography, are taking advantage of free bandwidth, free electricity and low rents to pursue the American Dream: running their own company.

But Bordier, managing director of Eastview, has found that not only will she have to educate the business commun ity about the potential value that technology entrepreneurs might bring to this suburb north of New York City, but she's discovered that these entrepreneurs require persuading, too.

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Minority groups seek strength in numbers

Affirmative-action programs have faced blistering criticism in the political arena over the past year. Those attacks may have contributed to "a declining commitment to the basic mission to increase minority participation in science and engineering," according to George Campbell Jr., president of the National Action Council for Minorities in Engineering (NACME).

Funding for scholarships to minority engineers has leveled off and groups promoting the entry of women and minorities into the technical workplace are finding it harder to get their message across both in Washington and in the corporate boardrooms. As a c onsequence, 21 minority technical organizations formed a leadership forum this summer called the Coalition for Equity and Access in Science, Technology, Engineering and Mathematics (C-STEM). The forum encompasses groups from a spectrum of under-represented technical professionals, such as the Society of Women Engineers, the Society of Hispanic Professional Engineers and the National Council of Black Engineers and Scientists.

Campbell, who heads NACME, was elected president of C-STEM. The groups have met informally for years. But today's hostile political climate for affirmative action has sparked a new urgency for a collective voice to promote the entry of minorities and women into the worlds of science, engineering and mathematics.

Affirmative action "has been politicized, distorted and misrepresented," Campbell said. "It has been equated with preferential treatment. But it was never intended to be a mechanism for providing preferential treatment. It was a mechanism to eliminate di scrimination."

"Affirmative action" has become such a lightning rod that "we may have to scrap the words altogether," said Campbell.

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Tuesday, September 17, 1996

Motorola tips '302 ISDN ICs

AUSTIN, Texas -- The networking and communications operation of Motorola Inc. has seen enough interest in the 68302 architecture to warrant the creation of three processors for basic-rate ISDN terminal adapter applications. The 68SC302 is intended for passive terminal adapters, while the 68QH302 and 68PH302 are intended for active adapters.

Moving to a passive design will depend on an OEM's choice of how much processing it wants to offload from the host. The 68SC302 processor was developed specifically for systems with powerful host processors able to handle some circuit-setup functions for ISDN, said Rex Kiang, product- line manager for the 68SC302. The SC302 integrates an ISA plug-and-play interface, as well as a PCMCIA interface. Its 1,536 bytes of RAM on board provides enough memory to implement 32-ms B- and D-channel buffers and to hold communication-processor parameters as well.

"Passive terminal adapters, though small in the U.S., should pass active adapters in shipments by the end of 1997," Kiang predicted. Motorola is providing a full reference design for passive systems with the SC302 when that device samples next month.

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DVD group finishes Version 1.0 spec

Version 1.0 comes with an appendix containing descriptions of the algorithm for an encryption scheme proposed by Matsushita Electric Industrial Co. The proposed copy-protection scheme awaits further evaluation and the blessing of the computer and movie industries. Nevertheless, the DVD Consortium agreed on the Matsushita proposal more than a month ago.

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PCI stands out at show

SAN JOSE, Calif. -- A stroll down the aisles at this week's Embedded Systems Conference attested to the burgeoning impact of PC architecture on embedded applications. Increasingly, that impact comes in the form of the 32-bit PCI bus, which got a twofold boost at the show.

PLX Technology Inc. (Sunnyvale, Calif.) previewed an ISA-to-PCI bus-transition chip, and a pair of single-board-computer (SBC) companies -- Ampro Computers Inc. (Sunnyvale) and Adastra Systems Corp. (H ayward, Calif.) -- unveiled Pentium boards that contained new versions of the PCI bus that were compatible with the 8-/16-bit ISA-bus-based PC/104.

The Ampro version of a PC/104-compatible PCI, dubbed PC/104-Plus, has already gained some advocates among the more than 90 members of the PC/104 Consortium and some have apparently gained early access to the spec. The spec was presented to the whole consortium for the first time at a meeting last Wednesday, but at least one other spec, Adastra's, was also to be put on the table. So the follow-on spec by Ampro -- the creator of PC/104 -- may not be the done deal some expect.

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Ascom pitches ATM optic ring

ATLANTA -- As fiber-transmission specialists in Denver debated the merits of time- and wave-division multiplexing at the recent National Fiber Optics Engineers Conference (NFOEC), a new division of Swiss telecom house Ascom was readying a fresh fiber-transmission concept. While many local-exchange carriers have been deploying Sonet rings without an overlay of ATM services, Ascom BroadNet (St. Petersburg, Fla.) has been promoting the concept of an ATM LightRing, in which ATM cells are carried on a metropolitan-area network loop without Sonet payload framing.

Ascom BroadNet will be operated as a division of Ascom Hasler, based in Bern, Switzerland. But the group has its roots in the Ascom Tech group, which worked on the European Race (Research on Advanced Communications in Europe) HiperNet and Cambridge, U.K., distance-learning projects. The group also developed an ATM-access architecture called GPACE based on the LSI Logic Corp. ATMizer chip.

Andreas Danuser, vice president and general manager of the new unit, said that Ascom's work on access architectures convinced the Ascom Tech team that an optical backbone transporting ATM traffic at 1.25-Gbit/second rates made the most sense for many metropoli tan and campus networks. All access nodes on the ring act as add-drop multiplexers, which route the ATM traffic based on the cell header.

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Designers overcoming flip-chip obstacles

SAN JOSE, Calif. -- Flip-chip devices have the smallest footprint of any usable semiconductor, and designers are finally coming up with techniques to make flip chips appeal to a broader class of users. Several papers presented here earlier this month at the Surface Mount International Conference explored new design and manufacturing techniques for this high-density chip-attachment technology.

One of the most important factors to be addressed is the coefficient of thermal expansion, which indicates a mismatch between the silicon and the board. Encapsulation is probably the best way to minimize this problem. Another road block is the close pitch of flip-chip technology, w hich ranges from 0.010 to 0.005 inches.

These challenges can be overcome, however. Universal Instruments set up a customized facility that assembled flip chip on board using a traditional surface-mount assembly line. Among the customizations needed were the addition of inspection equipment that could examine solder joints under the chip.

Chip scale provides most of the benefits of flip chip yet still has the handling benefits of a conventional package. Many observers feel chip scale will see very strong activity over the next couple years , but others note that the technology has its drawbacks.

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Monday, September 16, 1996

ATM silicon attacks Internet bottlenecks

OUDENAARDE, Belgium -- Mietec, the IC arm of European telecom giant Alcatel, is poised to fundamentally revise plans for home Internet access, support of home offices and distri bution of entertainment in the U.S. market. Driving this change will be a chip set that includes a 6-Mbit/second asymmetric digital subscriber line (ADSL) interface and a 25-Mbit/s asynchronous transfer mode (ATM) frame-handling device -- at a price feasible for use in people's homes.

By itself, the ADSL capability is already being closely watched as a potential solution to home Internet-access bottlenecks. But inclusion of the ATM framer opens the door to the ATM enthusiasts' holy grail -- end-to-end ATM over the existing twisted-pair telephone network. Such ubiquitous ATM could in principle handle the whole spectrum of projected home information needs -- from Web traffic to movies on demand.

The Dynamite chip set, which will be introduced next month, is Mietec's second version of ADSL silicon. An analog front end and digital ADSL modem chip came out in 1995 as samples for phone companies mounting video-on-demand and other trials based on twisted-pair copper wiring. The company's road map involve s continued integration, with the addition of 10-Mbit/s Ethernet protocol handling at the end of the year and an ARM RISC microprocessor core in 1998.

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Heat rises in Cadence vs. Avant! lawsuit

SAN JOSE, Calif. -- Cadence Design System Inc. and Avant! Corp. continued their bitter fight between legal rounds last week, as they awaited the results of last Tuesday's hearing, in which Cadence sought a preliminary injunction to bar Avant! from selling certain IC-CAD tools. The battle took new twists and turns, as Cadence claimed to have obtained fresh evidence of source-code theft, and Gerry Hsu, Avant!'s president and chief executive officer, said his company is ready for a settlement.

Both sides agreed after the Sept. 10 hearing that the judge gave no indication about how or when he might rule. Cadence is specifically seeking a preliminary injunction aga inst Arc-Cell and ArcCell-XO, Avant!'s flagship placement-and-routing products, recently renamed Aquarius-BV and Aquarius-XO.

Meanwhile, in an Aug. 27 brief, unsealed Sept. 6, Cadence claims that a computer log seized by the district attorney during the Dec. 5 search of Avant! shows a detailed plan by Tzyh-Lih Wuu, an Avant! founder, to steal up to 60,000 lines of Cadence source code. A nine-month-old criminal investigation is ongoing; no charges have been filed.

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Synopsys ups ante in verification

GENEVA -- Claiming to break new ground in logic verification, Synopsys Inc. will launch its long-awaited Cyclone cycle-based simulator and Arkos emulator at this week's EuroDAC show. With a new blend of technologies at the register-transfer level (RTL), Synopsys is signaling an aggressive move into a verification market that it so far has been unable to dominate.

Though smaller EDA companies have introduced cycle-based simulators and Viewlogic Systems Inc. announced one two years ago, Synopsys appears to be the first major vendor actually to ship a product. Cyclone's language-neutral capability means Synopsys is offering Verilog simulation for the first time -- a new stance for the Mountain View, Calif., company. Cyclone and Arkos are among several key verification announcements due at EuroDAC. Others include new formal-verification technology from Compass Design Automation and multithreaded cycle simulation from Frontline Design Automation.

Synopsys' approach to cycle simulation is unique in that it's focused on RTL code and not coupled with event-driven simulation. Thus, it will probably require users to modify their code, a possible point of controversy.

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Sonet transport catches a wave toward terabit rates

DENVER -- Wavelength-division multiplexing (WDM), once an academic curiosity for extending Synchronous Optical Network (Sonet) fiber speeds, burst into the mainstream at last week's National Fiber Optics Engineers Conference (NFOEC) here as the gateway to all-optical networking.

Transmission vendors showed multiplexing products that provide eight or 16 channels of wave-multiplexed Sonet signals. Bell Communications Research Inc. (Bellcore) provided details on a consortium -- funded with federal seed money and involving the regional Bells -- that will sponsor test beds to prove out WDM ring and star topologies for high-bit-rate traffic. And design engineers filled the WDM technical sessions to capacity.

WDM sends several optical signals along closely spaced wavelengths in the same Sonet pipe. It thus promises to provide a more cost-effective way to extend Sonet to terabit/second speeds than simply adding more optical fiber. Design engineers are discovering that time-division-mu ltiplexed Sonet rings and point-to-point links approach a practical speed barrier at 10-Gbit/s, OC-192 rates.

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Lucent's DSP first to execute 100 Mips

BERKELEY HEIGHTS, N.J. -- Lucent Technologies appears to have beaten market leader Texas Instruments Inc. to the punch in the race toward a 100-Mips digital signal processor. The company last week unveiled the fixed-point DSP1620, which crunches a whopping 120 million instructions per second -- twice the horsepower of today's state-of-the-art DSPs, said Will Strauss, president of Forward Concepts Co., a research consultancy in Tempe, Ariz.

"Shipping the first DSP to exceed 100 Mips at 3 volts demonstrates Lucent Technologies' commitment to maintaining its leadership role in the digital wireless infrastructure market," Strauss said.

Both TI and Motorola Inc. early in the year promised DSPs with super-high processing speeds and a mix of on-chip memory and peripherals for digital cellular base stations and other wireless applications. The two chip giants expect to release devices in early 1997.

"While others are talking about offering 100-Mips DSPs by year's end, we are sampling today at 120 Mips," said Aaron Fisher, general manager for wireless applications at Lucent's Microelectronics Group, based here.

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