Headlines and summaries from the pages of Electronic Engineering Times . Previous editions are available from the 1994 , 1995 , 1996 , 1997 , and 1998 News Archives.

01/19/96

Mentor acquires CoSoft

SIA moves to save scientific research

Sente sets sights on front-end power analysis

Nichia pumps up nitride blue-laser diode

NEC, Samsung tackle SDRAM compatibility

Ex-rivals Compass and Symbios team on deep submicron
What's new(s) at EE Times-interactive

01/18/96

EC drafting opto-backplane standard

Neural software that fills data gaps offered free

Project eyes adaptive-optics chip

DSP Group sees windfall in digital consumer electronics

01/17/96

Sand's analyzer probes PCI bus

SSI DSP chip controls disk drives' heads, spindles

Harris uses new process for half-bridge driver

Data-acquisition system stacks up

01/16/96

Mentor acquires modeling firm 3Soft

Cadence claims IC-CAD ensemble plays fresh tune

01/15/96

Intergraph spins out NT-based EDA unit -- VeriBest

Equipment, materials people told to get their act together

Digital DSP technology emerges as a star at CES

Hitachi goes back to pass transistor logic for next RISC processor

Acorn, Oracle forge Internet alliance

U.S. drops probe of Zimmermann

Mentor acquires CoSoft

By Richard Goering

WILSONVILLE, Ore. -- In a bid to shore up its Windows-based EDA offerings, Mentor Graphics Corp. has acquired CoSoft Ltd., a small U.K.-based schematic-entry company.

The purchase follows the acquisitions of 3Soft Corp. and Zeelan Technology earlier this week.

By purchasing the seven-person company, Mentor hopes to expand Personal Architect, developed by CoSoft, to serve areas other than pc-board CAD. Personal Architect aims at mixed Unix/PC clien t-server environments and has no connection with Mentor's Antares spin-off, which is chartered to provide tools for "shrink-wrapped" PC-based EDA.

In a departure from Mentor's usual acquisition strategy, the CoSoft name will disappear and five of its employees will relocate to Oregon to work in Mentor's Silicon System Creation division. The purchase was a stock swap, but the dollar amount was not revealed.

"Customers have responded very well to the notion of a satellite client that CoSoft provides," said Bob Ard, vice president of design creation at Mentor. "We really wanted to bring together their technologists with our technologists and broaden [Personal Architect] usage to FPGAs, analog, custom ICs and some areas of ASIC design."

SIA moves to save scientific research

By Brian Fuller and George Leopold

PEBBLE BEACH, Calif. -- The Semiconductor Industry Association (SIA) is discus sing a proposal that calls for a U.S.-wide industry-university effort to save basic scientific research.

"The clock has been turned back to about 1950," said Jim Glaze, SIA's vice president of technology programs, referring to government funding of research. Federal budget cuts have hurt basic research, and other areas, such as health care and education, now have policy priority, he said. U.S. companies, under profit pressure, are loath to fund anything that can't be commercially applied, he added.

"Government won't fund anything that's too applied, and industry won't fund anything that's too risky," Glaze said. "It's a uniquely American dilemma."

Glaze, speaking recently before the annual Industry Strategy Symposium here, sponsored by the trade group SEMI, called for university-industry research centers clustered around industry centers. The centers would get access to the latest commercial technology and would turn out trained scientists.

Multiple universities would be involved in each cente r, bringing their resources and teachers to bear on basic research. The focus would be on issues relating to the SIA's road map for semiconductor technology into the next century, Glaze said.

The budget would be split this way: IC makers would pay for half, equipment and software vendors 20 percent, Defense Department 20 percent, and fabless and OEM systems companies 10 percent.

"It's simply a pro forma and it could change. It has by no means been accepted by SIA, but it is being discussed within SIA," Glaze said.

Sente sets sights on front-end power analysis

By Richard Goering

CHELMSFORD, Mass. -- In an attempt to bring power analysis to the front end of the design cycle, startup Sente Inc. next week will unveil Watt Watcher, its first product. A presynthesis power-analysis tool, Watt Watcher is a response to the growing emphasis on low-power design in such markets as portable com puting and telecommunications.

Sente was formed last year to address power analysis. Lorne Cooper, Sente's president, had been vice president of engineering and chief technologist at Viewlogic Systems Inc. (Marlboro, Mass.).

Sente's product comes in two versions: Watt Watcher/Architect for register-transfer-level (RTL) Verilog designs and Watt Watcher/Gate for synthesized designs. The RTL product supports both probabilistic- and simulation-driven analyses. While Design Power from Synopsys Inc. (Mountain View, Calif.) offers similar features, Watt Watcher/Architect claims to operate at a higher level because it doesn't require a synthesis run.

Though transistor-level power-analysis tools have been available from such suppliers as Epic Design Technology and Anagram, a presynthesis analysis is becoming increasingly important, said Gerald Frenkil, vice president of low-power design. "If you're designing for low power, you can have a much bigger effect on reducing your power earlier. The rule of thumb is tenfold," he said.

Nichia pumps up nitride blue-laser diode

By Ashok Bindra

TOKUSHIMA, Japan -- Researchers at Nichia Chemical Industries Ltd. have fabricated an electrically pumped blue-laser diode using wide-bandgap III-V nitride-compound semiconductor materials. As reported in the Jan. 15 issue of the Japanese Journal of Applied Physics by Nichia senior researcher Shuji Nakamura and colleagues, the diodes achieved 417-nm-emission wavelength under a pulsed-current injection at room temperature.

Producing 215 mW of pulsed output power at a forward current of 2.3 A, the indium-gallium-nitride (InGaN)-based multi-quantum well (MQW) laser diode was grown on a sapphire substrate.

Nichia said it plans to develop a practical model in two years. But the researchers indicated that the technology could become commercially feasible next year. Toward that end, Nakamura said that work is u nder way to reduce operating current and operating voltage. The operating voltage is currently about 30 V. Meanwhile, researchers are also investigating failure modes, higher duty cycle and wider pulse widths.

The blue laser will lead to increased storage density for CDs and digital video disks (DVD), wherein the laser diodes will be used as read/write light sources, the researchers said.

NEC, Samsung tackle SDRAM compatibility

By David Lammers

TOKYO -- Samsung Electronics and NEC Corp. are discussing ways to achieve drop-in compatibility for their next-generation synchronous DRAMs (SDRAMs), after customers found subtle differences in the timing parameters of various vendors' 16-Mbit SDRAMs.

The two plan to achieve compatibility for 30 specifications, including setup time and ac current, said Misao Higuchi, an NEC memory engineering manager. Early adopters of 16-Mbit SDRAMs complai ned that even though the chips adhered to the standard agreed upon by Jedec members, minor differences prevented second-source capability.

"Our goal is to have the same data-sheet specifications," Higuchi said.

NEC is completing development of its third-generation 16-Mbit SDRAM; commercial samples are expected in the second quarter, with full production by the summer. The target date to achieve compatibility is June.

Besides offering drop-in replacement, the companies are committed to erasing the 20-percent price premium for SDRAMs compared with extended-data-out DRAMs. Higuchi said NEC expects to erase the premium for the SDRAM "lite" devices by the second half, but a price penalty on the full SDRAMs will last longer for workstation customers.

Ex-rivals Compass and Symbios team on deep submicron

By Loring Wirbel

FORT COLLINS, Colo. -- Compass Design Automation Inc. will develo p a common set of 0.35-micron cells for Symbios Logic Inc. and Symbios parent Hyundai Electronics Industries under a three-way pact. The deal allows Symbios to concentrate on development of analog modules for its ASIC and ASSP businesses and ensures a common set of macros for three-, four- and five-layer metal CMOS processes.

While the three-way alliance shares similarities with earlier "deep-submicron" pacts Compass formed with NEC Electronics Inc. and Texas Instruments Inc., it is unique given the history of Compass and Symbios. Compass was spun from VLSI Technology Inc. (San Jose, Calif).; Symbios is the former NCR Microelectronics, renamed when Hyundai acquired NCR from AT&T. At the start of the decade, NCR and VLSI were direct rivals in cell-based ASICs.

Bill Wuertz, director of tools and libraries at Symbios, said that "Hyundai had an existing relationship with Compass" but that Symbios itself "had never worked with Compass before this pact was signed."

EC drafting opto-backplane standard

By Peter Clarke

HARLOW, England -- A European Community project dubbed Standardized Packaging and Interconnect for inter- and intra-Board Optical Connections (Spiboc) aims to standardize an optical-fiber backplane connection system supporting channels with data rates of up to 2.5 Gbits/second.

Part of the work supports construction of a demonstrator system: a massively parallel processing computer, from White Cross Systems Ltd. (Bracknell, England), that's due to appear in demo form later this year. Expected advantages of the fiber-based backplane subsystem include higher data throughput than could be achieved from an equivalent electronic backplane and the absence of any electromagnetic interference or crosstalk in the backplane.

The Spiboc project, part of Europe's Esprit information-technology research initiative, has been coordinated by Northern Telecom research arm Bell Nort hern Research Europe (Harlow).

Others in the Spiboc consortium are BritishTelecommunications, Bull S.A., Ericsson, Philips Optoelectronics Center, Telefonica, ETH Zurich, Europtics, Graseby Microsystems, IMC and White Cross Systems.

The interconnect system is based on so-called D-fiber backplane technology, developed at British Telecom.

Neural software that fills data gaps offered free

By R. Colin Johnson

TORONTO -- Neural-network software that fills in the gaps left by missing or erroneous data has been made available free online (http://www.cs.toronto.edu/~radford). The Bayesian neural network uses Markov chains and Monte Carlo methods to solve regression and classification problems even when data in the training set is missing or erroneous.

"My methods and Bayesian methods generally are particularly appropriate where the lack of data is the main limiting factor on perfor mance," said Radford Neal, a professor at the University of Toronto. He admits his Bayesian methods are not as useful with problems for which there is no lack of data, and the main limiting factor is computing power.

But there are other advantages to Bayesian learning, Neal said. For example, the approach can automatically determine normalization parameters that would ordinarily have to be found experimentally. Bayesian neural networks also avoid overfitting data, and there is no need to validate its learning. Finally, Bayesian neural nets are one of the few varieties that quantify the uncertainty in their predictions, Neal said.

Project eyes adaptive-optics chip

By Chappell Brown

ALBUQUERQUE, N.M. -- Integrating micromirrors with a high-speed differential-equation solver, a research project at New Mexico State University is aiming at a low-cost, compact adaptive-optics system. Pro ject leader Natalie Clark, a specialist in electro-optics at the university's department of electrical and computer engineering, has developed special algorithms that are being tested in a prototype system that will be able to correct virtually any type of distortion, whether generated by a lens systems or the atmosphere, according to the researchers.

The technology, which places a full system on a chip, could suit a variety of commercial and technical applications. "We are even getting some interest from movie people, since a system like this would be ideal for generating special effects or could enhance images," Clark said.

Adaptive optics is a growing field wherein arrays of lenses, mirrors or spatial light modulators, such as liquid-crystal panels, are put under computer control to manipulate light at the pixel level. Large-scale projects have been funded by government and university groups to build optical systems that can resolve fine details obscured by the atmosphere.

For example, ground-b ased telescopes can approach the resolution of the Hubble orbiting telescope by subtracting out the distortion introduced by the atmosphere. The military is interested in the technology for improving the range of optical imaging systems.

DSP Group sees windfall in digital consumer electronics

By Martin Gold

SANTA CLARA, Calif. -- For digital signal-processing and software-algorithm specialist DSP Group Inc., the digital conversion of consumer electronics promises a windfall. The company, which has risen to prominence by broadly licensing its DSP cores and TrueSpeech digital-compression technology to system and semiconductor vendors, plans to leverage those technologies to develop chips and chip sets for portable voice recorders and dictation machines, personal-computer telephony, full-feature cordless phones and digital answering machines.

The transition from analog to digital phon es and from tape-based to all-digital answering machines and voice recorders promises significant market opportunities for companies that have the right combination of DSP and algorithm technologies, said Eli Porat, president and chief executive of DSP Group. In a recent interview, Porat outlined his strategies for tapping the emerging digital consumer markets.

The goal is to develop DSP-based chips and chip sets that will embed the company's speech-compression and telephony algorithms in on-chip memory.

One priority for the company will be its Sel-Phone system concept, which envisions connecting household phones together to derive a low-cost residential intercom system. Porat said the company will implement the concept via a new version of the Pine DSP core combined with algorithms licensed from United Development Inc. (Tel Aviv, Israel).

Sand's analyzer probes PCI bus

By Richa rd Goering

SAN JOSE, Calif. -- Sand Microelectronics, a provider of synthesizable cores, has announced a performance-analysis tool for PCI bus designs. The tool, PCI Performance Analyzer (PPA), can be purchased separately or as part of the Sandesigner Advantage tool kit along with a PCI synthesizable core and bus model.

PPA runs with any Verilog or VHDL logic simulator at any level of abstraction, returning statistical data and performance data. It also flags protocol and timing errors, thus checking for compliance with the PCI 2.1 specification.

According to Sand Microelectronics president Anand Naidu, PPA fills a need that is not met by logic simulation alone. "This is really something that's been missing in the design environment," he said. "People have just been doing simulation for functionality, but nobody has really addressed the performance needs of the designer."

A logic-simulation run can validate functionality, but it won't tell the user whether a PCI design is meeting target perfor mance, Naidu said. "Say you wanted your PCI design to transfer data onto the PCI bus at 75 Mbytes/second," he said. "How can you determine that before you get hardware back? You could run an overnight simulation and look at thousands of pages of output, but that's a horrendous task."

PPA hooks up to the PCI bus during simulation. It doesn't necessarily require Sand's PCI bus model, but it does require a PCI bus model with the correct protocols. Users don't need to provide any additional information to PPA, but they can selectively filter data by identifying the target or master they want to monitor.

SSI DSP chip controls disk drives' heads, spindles

By Ron Wilson

TUSTIN, Calif. -- Disk-drive electronics is largely partitioned by technology. There will be a digital chip or two, a high-precision analog read/write channel, analog positioning circuitry and commodity memory. Conventio nal wisdom is that these technologies are sufficiently dissimilar that integrating any two of them will result in higher cost.

But Silicon Systems Inc. (SSI) has combined its mixed-signal position-control expertise with an industry-standard DSP core, producing a single-chip controller for both the spindle motor and the head positioner.

The 32H6840 combines two complete mixed-signal subsystems in one chip. Included is an analog servo-control module that interfaces to the head-positioning and position-feedback circuits on the drive. This module is coupled through on-chip A/D and D/A converters to the DSP core.

The second section of the chip includes the MOSFET

drivers for a brushless, sensorless, three-phase spindle motor. The drivers are controlled by a 12-bit pulse-density pulse-width modulator and speed, phase and power-fault detection circuitry.

All I/O circuitry operates at 5 V but is designed to withstand 20-V flyback from the motors.

Harris uses new process for half-bridge driver

By Ashok Bindra

MELBOURNE, Fla. -- Harris Semiconductor is offering the first chip to result from its second-generation power BiCMOS-with-DMOS process technology, dubbed HPA2. The chip is a fast half-bridge driver that reportedly can switch up to 2 MHz and withstand 100 V.

Harris is readying a number of other control and gate-driver circuits for power MOSFETs and plans to build a complete dc/dc converter on a chip. The company said the dc/dc converter will have broad input-voltage and 10-A-output capabilities.

The new part, the HIP2100, integrates control, a low-side section, high-side gate drivers and a bootstrap charge-pump diode to drive power MOSFETs at up to 2-MHz switching frequencies, said Rick Furtney, intelligent-power marketing manager for Harris. With a maximum turn-on and turn-off speed of 35 ns, the HIP2100 alleviates the propagation delay encountered in earlier high -voltage processes, Furtney said. And by allowing faster switching rates in power-supply designs, it cuts the size and cost of required magnetics.

Before the HIP2100, Furtney said, designers had to employ discrete designs or bulky pulse transformer drivers for switching at 500 kHz. Low-cost IC drivers were limited to 100 kHz.

Data-acquisition system stacks up

By David Lieberman

ARLINGTON, Texas -- WinSystems has integrated an intelligent A/D subsystem into the 3.6- x 3.8-inch format of the stackable PC/104 bus.

Placing eight 16-bit differential channels under the control of a dedicated on-board processor that preprocesses the acquired data "reduces the software overhead on the PC/104 bus host CPU," said vice president Bob Burckle. Every channel, he said, is "amplified, filtered, digitized, linearized, converted to engineering units, tested against minimum/maximum limits and stored in on-board memory, independent of the host CPU's activity."

The eight A/D channels on the WinSystems board, called the PCM-518, are independently programmable to handle the output from a thermocouple, resistance temperature detector (RTD), strain gauge, pressure gauge, resistor, thermistor, current loop or low-level dc voltage source. Sensitivity, calibration, linearization and gain for each channel are also independent and under software control. The board handles A/D conversions in less than 8 ms.

Mentor acquires modeling firm 3Soft

By Richard Goering

WILSONVILLE, Ore. -- In two small but highly strategic acquisitions, Mentor Graphics Corp. will announce this week the purchase of 3Soft Corp. (San Jose, Calif.), a provider of synthesizable models, and Zeelan Technology (Beaverton, Ore.), a supplier of signal-integrity models. Both deals expand Mentor's library offerings and underlie the growing emphasis by EDA vendors on intellectual property.

A pioneer in the rapidly growing synthesizable-model business, 3Soft sells the MacroWare library of building blocks and cores, including DSP processors with as many as 40,000 gates. Zeelan's MasterModel libraries are provided to signal-integrity simulator vendors on an OEM basis, and the company offers a measurement service for semiconductor vendors.

Wally Rhines, Mentor Graphics president and CEO, said the acquisition reflects Mentor's growing interest in the creation and marketing of libraries. "Making libraries available to a broader distribution channel helps our customers," he said. "Models are just critical to doing design."

Cadence claims IC-CAD ensemble plays fresh tune

By Richard Goering

San Jose, Calif. -- After suing Avant! Corp. (Sunnyvale, Calif.) last month, Cadence Design Systems has now launch ed a technical assault with Silicon Ensemble, a product family that claims a fresh approach to IC placement and routing. Cadence maintains that Silicon Ensemble goes far beyond Avant!'s recently announced ArcCell-XO, which Cadence maintains in its civil suit contains the company's proprietary source code.

Also this week, Silicon Valley Research (SVR; Mountain View, Calif.) will announce the first multilayer router based on its "line probe" technology, which claims better results than traditional maze routers. The new technology is part of Gards 8.0, a gate-array layout system.

ArcCell-XO and Silicon Ensemble, in contrast, target the rapidly growing "structured custom" marketplace, which includes large microprocessors. While primarily aimed at the cell-based market served by ArcCell-XO and Cadence's existing Cell3 product, Silicon Ensemble also supports gate-array-like embedded blocks.

With Silicon Ensemble, Cadence overcomes many of the competitive advantages claimed by Avant!, such as a fully hie rarchical database. It then attempts to do an end-run around ArcCell-XO with such features as its FlexChip Optimizer, which makes area routing easier to use; Universal QPlace+, which brings deep-submicron support to placement; integrated data-path placement; automatic power routing; and a block-import and model-generation capability.

"We've been doing three-, four- and five-layer metal routing for three years with Cell3, so XO is playing catch-up," said Tom Katsioulas, director of product marketing at Cadence. "But this system [Silicon Ensemble] is not even near where XO is. It has no competition."

Of particular note, Katsioulas said, is Silicon Ensemble's support of a wide range of placement and routing strategies--such as placement for data paths and random logic and routers optimized for power, crosstalk minimization and skew control. "We think this is essential to address the system-on-a-chip challenge moving forward, where you'll have different blocks with different characteristics."

Intergraph spins out NT-based EDA unit -- VeriBest

By Richard Goering

HUNTSVILLE, Ala. -- In an effort to build a Windows NT-based EDA powerhouse, Intergraph Corp. has spun out its Intergraph Electronics group into an independent company, VeriBest Inc. With some 350 people and a growing revenue stream, the new company will fight for leadership in an emerging high-end, Windows-based EDA market.

The move follows a rocky EDA history at Intergraph Corp., whose primary business includes computer platforms and mechanical CAD.

Though Intergraph Electronics never attained profitability and saw declining revenue from 1992 to 1994, the organization apparently reversed fortunes in 1995 with the release of its VeriBest Verilog simulation and pc-board CAD products.

VeriBest Inc. will be fighting with Viewlogic, PADS Software and Team Corp. for the high-end Windows market. Suppliers such as Orcad, Syna rio Design Automation and Mentor's Antares spin-off appear to be targeting a lower-priced market, but the boundaries can blur when so many vendors are embracing 32-bit Windows as their platform of choice.

VeriBest Inc. will be based in Boulder, Colo., and initially will be owned entirely by Intergraph, with employee stock options to follow. The Intergraph Electronics group claims software and service revenue of about $34 million in 1995, with an ambitious business plan calling for $57 million in software and service revenue this year.

Equipment, materials people told to get their act together

By Brian Fuller

PEBBLE BEACH, Calif. -- Technical, materials, labor and financial problems will conspire to hamper the semiconductor industry's ability to dip down into deep submicron design and rise up to become a $300 billion business by 2000, executives and industry observers said last week.

That forecast came at a meeting of 300 of the heavy hitters in the equipment and materials industry. They gathered here to assess what lies ahead in 1996 and beyond, and the news was sobering. Materials shortages will continue into at least 1997; the concerted effort to solve issues relating to 300-mm wafer manufacturing is falling apart; companies face an acute engineering shortage that is already starting to affect time to market and quality, and the collapse of technology stock prices could have an affect on corporations' ability to fund research and development.

A major silicon vendor put the onus for solving these problems squarely on the equipment and materials industry, saying executives themselves and not their silicon customers have to solve issues such as funding next-generation R&D and improving product turnaround time. Otherwise, said Curtis Crawford, president of AT&T Microelectronics, the march to a projected worldwide semiconductor market of $330 billion in four years will come to a halt.

Noting that the industry needs at least 160 new fabs to help it reach the magical $330 billion level, Crawford said the lead times from the equipment and materials industry are unacceptable.

"When are you going to get your act together so I don't have to wait 18 months for a stepper?" Crawford asked. "You've hesitated to add people. You've hesitated to buy new equipment."

While attendees at the meeting generally get an earful from at least one silicon vendor on the program, Crawford's was the most forceful call to arms in at least four years.

Digital DSP technology emerges as a star at CES

By Martin Gold

LAS VEGAS -- A raft of new digital consumer products captured the attention of most attendees to the Consumer Electronics Show that ended Jan. 8. However, the behind-the-scenes star was the digital-signal-processing technology that has become the engine of many of the systems that merge computing with communications.

New computer/telephony hardware, the emerging digital video disks, cellular phones with personal communications services features, advanced digital audio products, digital home satellite systems and many other new digital-based products for the home are expected to propel the use of DSP chips, resulting in sales volumes that suppliers have never seen before.

Many of the new consumer products will certainly use general-purpose programmable DSPs, which can accept new software algorithms as the audio, video and telephony standards evolve. Other consumer digital products will be driven by highly optimized DSP core-based ASICs, when the standards are fixed and in the very cost-sensitive applications.

This new digital consumer arena will put pressure on DSP vendors to provide significant increases in MIPS processing performance, more chip integration and a reduction in power consumption and operating voltages.

Hitachi goes back to pass transistor logic for next RISC processor

By David Lammers

TOKYO -- Hitachi Ltd. has revived a technology that hearkens back to the pre-CMOS era. It is called pass transistor MOS logic, and Hitachi is using it in its next-generation RISC processor, the SH-4.

Hideo Inayoshi, a manager at Hitachi's microcomputer development office, said preliminary test results indicate that pass transistor logic, or PTL, will provide a 30 percent reduction in the number of transistors required for most logic circuits, compared with CMOS. The work is no back-room research project: more than half the non-cache portion of the SH-4 will be composed of pass transistor logic circuits, especially the control and random gate logic. The rest will be made of conventional CMOS-based logic.

At the simplest level, a switching gate that requires two transistors with CMOS requires only one with pass transistor logic. However, an in verter requires two transistors in both CMOS and PTL, and in such cases Hitachi plans to stick with the tried-and-true CMOS-based logic descriptions "to avoid unnecessary risk." However, in some cases PTL delivers big transistor savings: a 4-bit adder that might require 30 to 40 transistors in CMOS can be built with 20 to 30 transistors with PTL, he said.

Acorn, Oracle forge Internet alliance

CAMBRIDGE, England -- Acorn Computer Group confirmed it is working for U.S. software giant Oracle Corp. to develop reference designs for low-cost Internet computers. The machines, described as "network computers," will be based on the Hyper-Text Markup Language (HTML) and Sun Microsystems' Java programming language and defined at a level independent of specific hardware architectures.

Cost savings over current PC architectures are expected to come from dispensing with local mass storage and minimal R AM requirements. Who will make the machines remains up in the air. In the past, Oracle has said it would not build such machines itself. A spokesman for Acorn Computer Group said the design engineering team would be drawn from all the technical resources within the group. Acorn, itself 79 percent-owned by Italian computer maker Ing. C. Olivetti & C. SpA, includes Applied RISC Technologies, a division set up for just such reference-design work, and Online Media, a maker of video-on-demand set-top boxes that use a TV as the primary means of display.

U.S. drops probe of Zimmermann

SAN JOSE, Calif. -- A three-year-long federal criminal probe of Phil Zimmermann--an independent software developer who wrote the Pretty Good Privacy (PGP) encryption package and offered it on the Internet--came to a close last week. William Keane, the assistant U.S. attorney handling the case, told Zimmermann's lawy er, Phil Dubois, that Zimmermann would not be prosecuted. Keane did not provide a reason.

"My belief is the government decided not to prosecute for several reasons," said Dubois. "First, Zimmermann did not commit a crime. Also, the government didn't want to get involved in a big legal and policy argument--are you exporting something if you post it on the Internet?"

Zimmermann plans to continue to work as a privacy advocate and computer consultant.

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