EET-i Top of the News
Week of 10/16/95

- 10/19/95
Despite agreement, DVD camps still at odds
Board makers embrace PowerPC, Sharc
Outlook for EDA is good
Maxtor sells off factories
Sharp looks to brighten LCD biz with new panels
What's new(s) at EE Times-interactive
- 10/18/95
VLSI Tech method screens IC failures -- before production
MIT project sees machine vision for the masses
Image processing gets smart-memory ICs
Biology inspires robotic camera mount
Evolvable hardware and autonomous robots star
Program shows kids that technology's fun
Politicos wi
se up to importance of tech education
- 10/17/95
Intel to introduce Pentium platform for Multibus
'Liquid' tool analyzes active-matrix LCDs
Tektronix unveils four digital scopes
Orca tool launched amid controversy
Trimm Tech introduced RAID for networked PCs
Chip sets take E1/T1 to twisted-pair lines
Embedded systems news!
- 10
/16/95
P6 includes on-chip test structures
Intel's multimedia extensions to x86 hurting foes
Mentor acquiring Microtec, tying EDA to software design
EE employment on rise
Oracle ITV software respun for Internet
Semiconductor industry is in a boom cycle

Despite agreement, DVD camps still at odds
By David Lammers
OSAKA, Japan -- More than a month after hammering out a compromise on the most important aspects of a unified digital-video-disk standard, the two DVD camps continue to discuss technical differences of the format, as well as the complicated issue of patent licensing, sources said on the opening day of the 34th Japan Electronics Show here.
Representatives of Sony Corp. and Philips (Eindhoven, the Netherlands), the two main companies in the multimedia CD (MMCD) camp, meet regularly in Tokyo with executives from Toshiba Corp. and Matsushita Electric Industrial Co. Ltd., the two companies representing the seven core members of the Super Density (SD) group.
Toshiji Kanamaru, general manager of the engineering department at Matsushita's DVD business-promotion office, said the MMCD and SD groups are sticking by their agreement to adopt Sony's EFM Plus modulation/demodulation scheme. However, another source said SD group engineers continue to question the untried and untested EFM Plus modulation technolog
y.
"There is no basic problem with the 8:16 modulation system," Kanamaru said. "What is happening is that Sony engineers are reading the technical data about the SD system and are asking about some of the technical points, including the audio."
Board makers embrace PowerPC, Sharc
By David Lieberman
BOSTON -- Along with the falling of leaves up in "Array Processor Alley," the Intel i860 is falling from favor with the vendors of high-end signal-processing architectures. Two of the Northeast's Mflops jockeys will be strutting new stuff at the DSP World Expo conference here next week, as Mercury Computer Systems (Chelmsford, Mass.) and CSPI (Billerica, Mass.) embrace both the PowerPC microprocessor and the Sharc DSP for their respective multiprocessing architectures.
Mercury will introduce a VMEbus board that takes a pair of mezzanine boards, each packing either two PowerPCs or fro
m two to six Analog Devices Sharc DSPs. CSPI, in turn, will unveil a PowerPC-based VMEbus board that takes a pair of PMC (PCI Mezzanine Card) boards, each containing four Sharcs. Beyond their migration to new processor architectures, the two schemes share another feature: the use of the front-panel data-port (FPDP) interface, which is rapidly becoming a de facto standard for high-speed I/O in signal-processing applications.
Both companies tipped their hats to the balanced performance of the i860, but indicated that the performance curves of newer RISC and DSP architectures dictated moving on and splitting their bets.
Outlook for EDA is good
By Brian Fuller
SAN JOSE, Calif. -- Executives in the design-automation business may be wringing their hands about anemic growth in some areas, but the industry is poised to nearly double in the next five years, Dataquest forecasts.
Electro
nic-design-automation analyst Gary Smith estimates in a new report that the EDA business will grow from a forecast $1.6 billion this year to $3.05 billion in 1999. The numbers indicate a 16-percent compound annual growth rate as EDA managers have altered business models and adopted new consulting philosophies to boost revenues.
The hottest growth area will be system-design level, at 36-percent compound annual growth, with register-transfer-level (RTL) tools following at 23 percent.
Analysis tools will be snapped up by eager designers trying to overcome the thermal, electrical and layout challenges of deep-submicron design.
"First and foremost, the design gap has become a major issue for the semiconductor industry," wrote Smith and colleagues Jim Tully and Linda Anderson, referring to the inability of design-automation tools to keep pace with the features available in silicon.
Maxtor sells
off factories
By Terry Costlow
SAN JOSE, Calif. -- Slowly and carefully, Korea is getting a better grip on storage media.
The latest evidence came late last month when Maxtor Corp., in another move to return to profitability, sold its manufacturing operations to Hyundai Electronics Industries Co. Ltd. for $100 million.
Hyundai, which owns 37 percent of Maxtor, is buying manufacturing facilities in Singapore, Hong Kong and Thailand, which include the contract manufacturing group that Maxtor established earlier this year. The two made the move to alleviate expenditures that Maxtor would have had to incur to upgrade manufacturing operations for production of new products.
Hyundai is clearly extending its control over Maxtor in business-disk drives--in which foreign interests have had little success getting market share. U.S. companies control 90 percent of the sector.
"What Hyundai is doing is making Maxtor a native company," said Dal Allan, president of ENDL Consulting (Saratoga
, Calif.). "By taking over control of the plants, it's just leaving R&D and marketing here."
Sharp looks to brighten LCD biz with new panels
By Yoshiko Hara
TOKYO -- Sharp Corp., fighting to inject new life into its display business, has unveiled flat panels that range from a 28-inch behemoth to small, low-power-consumption displays for PDAs.
Prototypes of Sharp's latest panels were to be shown to the public at the Japan Electronics Show '95 in Osaka this week.
However, the executive in charge of Sharp's LCD business, Isao Washizuka, warned that while LCD unit shipments were showing double-digit growth this year, revenues were likely to decline slightly. The ratio of dual-scan, passive-matrix color displays has increased vs. the more-expensive active-matrix TFT color panels, he said.
For Japan's entire flat-panel industry, the value of TFT-based panel production is hove
ring around the same level as last year. Unit shipments of active-matrix displays are likely to increase by about 4 percent, while STN-based displays continue to show double-digit growth both in unit shipments and in total production value, said Washizuka, senior executive director at Sharp (Osaka).
Earlier this fall, the shares of Hoshiden Corp. plummeted on reports that its display business also was under extreme price pressure. Reports that Hoshiden, a major OEM supplier, would fall into the red this fiscal year were not confirmed by a Hoshiden spokesman, who declined to provide details on Hoshiden's profit prospects.
VLSI Tech method screens IC failures -- before production
By Gail Robinson
SAN JOSE, Calif. -- VLSI Technology Inc. is developing an approach to circuit-failure prediction that focuses on process parameters rather than individual-IC test. The effort is part of a
search for new techniques to predict circuit failure before parts enter production.
Increasing circuit complexity and decreasing device size yield thinner gate structures, which are more susceptible to small variations in quality. As a result, such issues as oxide uniformity become significant reliability factors. VLSI Technology's method tests oxide reliability at the wafer level, correlating predictions of oxide quality with product failure.
"When ICs are shipped out, they are not perfect. The tail end of the lifetime distribution is very short, with some ICs failing within the first year of operation," said Subhash Nariani, manager of reliability physics at the company. "In looking for a way to expose the potentially failing parts, the trick is to predict the 'infant mortality' of a sample of ICs without having to test each component.
"So, rather than stick individual ICs into a tester, we have designed a wafer-level test that shows how the ICs on the wafer behave in terms of infant mortality.
"
MIT project sees machine vision for the masses
By Chappell Brown
CAMBRIDGE, Mass. -- Image recognition has developed as a high-end research area associated with supercomputers that costs millions of dollars. The arcane algorithms and pricey equipment have restricted machine-vision development to a few researchers at major corporate or academic labs. Now, however, a project at MIT's Artificial Intelligence Lab is reworking the basic technology to bring image recognition into the realm of desktop computing.
Chris Barnhart and Ian Hors have developed a single-board architecture they call the "Cheap Vision Machine" (CVM), which can be programmed in a version of C that uses a library of hardware-optimized image-recognition routines. Barnhart has formed a company based on the research called
Digital Designs and Systems Inc.
, which offers a
single-board vision-recognition system called the Color Vision Machine, selling for $3,500.
"The technology to do a low-cost vision system has been around for awhile, but no one has been thinking in those terms," Barnhart said. "With high-performance DSPs now selling for $10, there is no reason that sophisticated image-recognition capability cannot be offered to anyone wanting to integrate it into their systems."
Image processing gets smart-memory ICs
By Gail Robinson
CAMBRIDGE, Mass. -- By integrating logic operations with memory, researchers at the Massachusetts Institute of Technology (MIT) here are breaking new ground with smart-memory chips that target machine vision and real-time image processing. The project originated with an innovative associative-memory architecture derived by modifying a conventional RAM architecture and is now evolving into what could turn out to be a
low-cost processor-per-pixel imaging system.
"We are working on accelerated image processing in a workstation or PC environment," said MIT researcher Charles Sodini. "If you think about arithmetic accelerators that plug into workstations, our goal is to build a single-board image accelerator." Associative memory's chief advantage is the ability to match data without having to read it out of the chip. Sodini and a fellow MIT colleague, Jeff Gelow, decided to amplify this architecture by adding logic to the memory array to produce an array of image processors. Sixty-four associative-memory cells were packaged with additional logic to perform arithmetic operations and route data through the array. The result is a fine-grained parallel processor that looks much like a RAM memory chip.
Biology inspires robotic camera mount
By Chappell Brown
MONTREAL -- Recognizing an object require
s many levels of image processing: everything from isolating geometric components such as edges and surfaces to high-level cognitive algorithms that extract meaning from a collection of objects. Even when all of these computational layers are in place and interacting, a further component, which has not received as much attention, is the mechanical feedback and positioning systems that respond to areas of interest in a scene, and refocus. Incorporating motion into image-recognition tasks is crucial to building robots that navigate without any predetermined track to guide them.
Vision researchers at McGill University here have developed an image-processing testbed that includes a mechanical feedback loop to the camera to explore this crucial aspect of the image-recognition problem. The design is inspired by biological research into the operation of the eye and includes innovative "foveal" algorithms as well as new electromechanical camera-control systems.
Evolvable hardware and autonomous robots star
By R. Colin Johnson
LAUSANNE, Switzerland -- Sweeping changes to silicon devices, such as FPGAs, to meet the needs of next-generation learning methods were proposed this month at back-to-back meetings on evolvable hardware and autonomous robots.
Building hardware with today's technologies was the focus of "The Advanced Study Institute on the Practice and Future of Autonomous Agents" (ASI
; Sept. 22-Oct.1; Monte Verita, Switzerland). Then, future technologies were covered the next day at "Towards Evolvable Hardware: An International Workshop" (TEH; Oct. 2-3; Lausanne).
The week-long ASI meeting focused on the state of the art with six serial tracks. The first track studied classical cognitive problems faced when attempting to build small mobile robots that sense and interact with the environment in significant ways--for example, it would be nice to have robots that can find an el
ectrical outlet and recharge their own batteries.
The second evolutionary track took much the same tack as the cognitive sessions, but covered genetic algorithmic approaches, including artificial evolution, and optimization as applied to control problems. The workshop covered evolving neural networks to solve control problems.
Program shows kids that technology's fun
By Robert Bellinger
They build earthquake-resistant towers. They tackle electric cars. They construct closed circuits. They send dot-and-dash messages to each other via primitive telegraphs they've constructed, and read those messages using Morse code.
They're kids.
Based on the premise that kids will like science if you let them work with it, Future Scientists and Engineers of America (FSEA) is an after-school program designed to give children hands-on experience with science and engineering principles. The
program, which began in 1990, has 140 chapters, mostly in the West.
"What I love most about this," said Steve Estrada, an FSEA student, "is that we are doing science and all that, but it doesn't seem like it."
That's just what founder George Westrom wants to hear. "Technology is not boring. It's fun. It's exciting," says Westrom, a veteran engineer with more than 40 years' experience at Ford Aerospace, Rockwell International Corp. and now Odetics (Anaheim), where he is the part-time director of advanced systems development.
FSEA's hour-long sessions after school are aimed at countering boredom by collecting 30 kids in a room, breaking them up into teams and letting them loose on one of a couple of dozen projects that Westrom and other FSEA volunteers have prepackaged for grades 4-12.
Engineer and scientist volunteers, usually recruited from a sponsoring corporation, lead the sessions, accompanied by a teacher.
Politicos wise up to importance of tech education
By George Leopold
WASHINGTON -- Technology's place in the classroom has attracted high-level attention in recent weeks, including a presidential initiative launched during a California campaign swing and high-profile congressional hearings. Both ends of Pennsylvania Avenue, it seems, have discovered the issue as the 1996 campaign season looms.
Following up on a plan announced last month in San Diego to wire the nation's schools by 2000, the White House convened an Oct. 10 meeting of industry executives, including Disney chairman Michael Eisner; Turner Broadcasting's Ted Turner; and his new boss, Time Warner chief Gerald Levin, to consider the big picture. The results were $9.5 million in technology grants to 19 communities to create interactive curriculum and formation of a U.S. Technology Corps that will muster industry volunteers to bring technology into the nation's schools.
The White House initiative
calls for networked computers in every kindergarten through 12th-grade classroom backed by computer-trained teachers.
Intel to introduce Pentium platform for Multibus
By David Lieberman
HILLSBORO, Ore. -- Computer markets spin faster than they used to. Back at the birth of Multibus II, the 80286 microprocessor was king. It took four years for the 386 to surpass it in unit shipments, according to Intel figures, and three years for that processor to give way to the 486. Crossover to the Pentium has taken just two and a half years, and the Intel OEM Modules Operation (OMO) hopes to push the curve by introducing a new Pentium platform for Multibus II next week.
The P5090/5120 Multibus II boards come equipped with either a 90- or 120-MHz Pentium, 256 kbytes of level-2 cache, up to 1 Mbyte of paged flash memory and up to 64 Mbytes of SIMM DRAM with current memory technology. DRAM will ris
e to 128 Mbytes in the future, Intel said. Two flavors provide either a basic CPU or a single-board computer with integrated Ethernet and fast (10-MHz) SCSI-2.
The SCSI-2 host adapter chip, an Adaptec 7850, sits on the board's backbone PCI local bus, which it shares with a Multibus/PCI bus-bridge ASIC. The Ethernet controller chip, an Intel i82595TX, sits on a subsidiary ISA bus, which it shares with one parallel port, two RS232 serial communications ports and a PCI/ISA bridge.
'Liquid' tool analyzes active-matrix LCDs
By Richard Goering
PALO ALTO, Calif. -- Technology Modeling Associates Inc. (TMA) has come out with a software tool, called Liquid, that analyzes active-matrix liquid-crystal displays (LCD). Targeting both system and component designers, the tool opens a new market for TMA, which provides software for IC process simulation.
Liquid analyzes the entire flat-panel di
splay, including the thin-film transistor (TFT), liquid crystal cell (LCC), electrical interconnect and optical systems. It simulates those subsystems and displays the results as a simulated image on the user's workstation. The tool also provides polar plots of contrast ratios and tables of current-voltage (I-V) curves.
Liquid can help LCD designers evaluate such effects as the impact of the viewing angle on the displayed image; display contrast ratio; display response time or flicker rates; and crosstalk. It analyzes all electrical effects, including parasitics. Liquid can detect such problems as a loss of image quality because of lossy gate lines.
Tektronix unveils four digital scopes
By Stan Runyon
BEAVERTON, Ore. -- Tektronix Inc. poured the foundation for its Digital Real-Time (DRT) sampling technology last year when it brought out the TDS 684A, a digital scope that absorbs data
at a 5-Gsample/second rate on all channels and that captures single-shot phenomena with a 1-GHz real-time bandwidth. The company now is adding bricks to the DRT structure, in the form of four new scopes architected in the technology.
The new members of the TDS 600B family "incorporate our customers' inputs," said product-marketing manager Nicholas Rexing. "They asked for features like peak detection, deskewing of timing measurements and certain types of triggering."
Two of the four members--the TDS 684B and 680B--retain the earlier scope's sample rate and bandwidth. The two new entries differ from each other mainly in channel count and type of CRT: four and color for the former and two and mono for the latter. The 684B also claims a floppy-disk drive and fast Fourier transform (FFT) capability.
Orca tool launched amid controversy
By Richard Goering
BERKELEY HEIGHTS, N.J. -- AT
&T Microelectronics has shipped Foundry 7.1, the first AT&T-developed release of Orca FPGA placement and routing software. NeoCad had developed the software before being acquired by Xilinx, and negotiations regarding the tool's ownership are apparently ongoing between Xilinx and AT&T.
AT&T claims it acquired source-code rights from NeoCad before the Xilinx acquisition. AT&T's new Boulder Development Center, staffed by six former NeoCad employees, has been upgrading and maintaining the software.
Xilinx, however, has not publicly confirmed the AT&T claim. Sources say negotiations are continuing, but both AT&T and Xilinx refused to comment on their status or on any agreement that might have been reached.
The 7.1 release supports the full line of AT&T Orca FPGAs, including the 40,000-gate device introduced earlier this year and the new 3.3-V, 15,000-gate ATT2T15 device.
Trimm Tech introduced RAID for networked PCs
By Rick Boyd-Merritt
LAS VEGAS -- PC-based servers have been evolving from single-processor 486 desktops that manage files or printer access for a local-area network, into multiprocessor 586-based systems that are powerful enough to host major network applications. Trimm Technologies, based here, has developed a redundant array of individual disks (RAID) that is, in effect, a smart network storage unit that could obsolete the PC file server.
The Network Direct RAID (NDR) storage subsystem can stand alone on a LAN and allow users access to 30 Gbytes of hard-disk capacity, without attaching to a file server. "The days of the 486 file server are numbered," said Phil Drachman, vice president of sales and marketing for Trimm. "The NDR won't take the place of a fault-tolerant server, but I have given demos where I've turned off the file server on the LAN and our unit continues to operate just fine."
The NDR's intelligence resides in a PCI-bas
ed controller card from Symmetrical Technologies that offers a standard Ethernet connection to the LAN and a SCSI connection to the array of drives.
Chip sets take E1/T1 to twisted-pair lines
By Peter Clarke
TEL AVIV, Israel -- Founded in December 1992 to provide chip sets for high-data-rate subscriber loop (HDSL) telecommunications, Metalink Ltd. claims to be the first company to support both T1 and E1 data-rate connections over a single twisted-pair line. Until recently, those standards were implemented by telephone operators using two or three twisted-pair lines in parallel to achieve sufficient bandwidth.
The North American TI standard is 1.552 Mbits/second, and the European equivalent E1 is both 2.064 Mbits/s and 2.320 Mbits/s.
Metalink creates numerous three-chip sets by drawing chips from three-function families: the MtHxx10 digital transceiver, the MtHxx30 framer and map
per IC, and the MtHxx40 analog front end (AFE). The transceivers are packaged in 100-pin thin quad flat packs, the framers in 68-pin plastic leadless chip carriers, and the AFE is a hybrid assembly with a 44-pin dual-in-line foot print.
The MtH1610/30/40 set supports T1 transmission over single-pair wiring. The MtH2010/30/40 set supports E1 over single-pair wiring at 2.064 Mbits/s. A third chip set, MtH2410/30/40, is being sampled that supports transmission at the higher E1 rate.
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P6 includes on-chip test structures
By Alexander Wolfe
SANTA CLARA, Calif. -- In an architectural decision with b
road significance for x86 systems designers, Intel Corp. has equipped its P6 microprocessor with heavy-duty, on-chip test structures, according to a confidential draft of the P6 user's manual obtained by EE Times.
The features include a built-in debug port for monitoring CPU operation, and separate, standalone simulation software for verifying motherboard designs.
Because the P6 is far more complex than previous x86 processors, the beefed-up capabilities are expected to play a much more crucial role in the design of motherboards, desktop PCs and multiprocessing servers than did similar features on the Pentium.
"The complexity of the design is higher--the [P6] bus is substantially more complex," said Lew Paceley, marketing director for the P6. He specifically declined to comment on the presence of a debug port, but addressed the importance of the simulation tools. "The electrical constraints probably pose the largest challenge to a designer. To really understand the electrical behavior of your syst
em--the signal integrity, the delay times--you have to do simulation."
Intel's multimedia extensions to x86 hurting foes
By Ron Wilson
SAN JOSE, Calif. -- Multimedia extensions to the x86 instruction set are becoming the superweapon of the Pentium-class arms race. Information from the 1995 Microprocessor Forum last week showed the true significance of Intel's decision to add instructions to the P55C CPU--that the new multimedia extensions threaten to obsolete the entire coming generation of Pentium-class chips from Advanced Micro Devices, Cyrix and NexGen.
Those three vendors, under the encouragement of system vendor Compaq Computer Corp., are struggling to counter Intel's challenge with their own extensions as part of the OpenPC specification. But they may be too late.
At the center of the battle is a group of new instructions implemented in Intel's unannounced P55C Pentium chip
. These are the first major additions to the x86 instruction set in years. Industry sources told EE Times that the new instructions are based upon concepts in the Visual Instruction Set (VIS) implemented by Sun Technology Business in the UltraSparc CPU. But there are said to be numerous differences between the P55C instructions and VIS, reflecting both industry experience with the Sun effort and the differing needs of the x86 environment.
VIS extends the Sparc instruction set in roughly three directions. Block move instructions are provided for moving large numbers of pixels between the CPU registers and a frame buffer. Signal-processing primitives, such as multiply-accumulate (MAC) instructions, are included to speed DSP activities. And a new operating mode, in which a data word is treated as a set of separate 8-bit pixels, is introduced.
Mentor acquiring Microtec, tying EDA to software design
By Richard Goering
WILSONVILLE, Ore. -- In a bold move that links EDA to software design, Mentor Graphics Corp. has announced its intention to acquire Microtec Research Inc. (Santa Clara, Calif.), one of the largest providers of embedded software development tools and real-time operating systems. The merger will create the first company that can offer a broad set of solutions for both hardware and embedded software design.
Valued at roughly $130 million, the acquisition comes at a time of rapid change and growth for the embedded-software-development market. Although deeply fragmented and considerably smaller than the EDA industry, the embedded-software market is poised for rapid growth as designers move to 32-bit processors and buy off-the-shelf tools and operating systems.
The acquisition also reflects a growing realization that hardware and software design must be integrated. "Everybody talks about hardware-software codesign, but nobody does anything about it," said Wally Rhines, Mentor Gr
aphics president and CEO. "Well, we have done something about it. We have broken the mold and created a new kind of company."
EE employment on rise
By Robert Bellinger
UNION, N.H. -- Engineering employment shot past the 2 million mark for the first time last quarter, with EEs riding a record wave of hires as well.
Robert Rivers, publisher of Engineering Manpower Newsletter, said 2,009,000 engineers of all disciplines were employed in the second quarter, up from the 1.9 million last quarter. Electronic engineers also enjoyed the boom, hitting 649,000 employed and topping the first-quarter 1990 peak of 622,000. Employment has been hovering around 550,000 for the past few years and fell below a half million in 1993 during the downsizing wave. In 1995 it has risen from 572,000 in the first quarter to a new high of 625,000 in the second quarter before that was eclipsed by the latest data.
Asked whether "happy days are here again" for engineers, the ever-cautious Rivers would say only, "reasonably happy days are here."
He"s uncomfortable with the rather pallid performance of the gross domestic product, which expanded by only 1.3 percent last quarter. Saying he would be happier with 2.9 percent, he pointed out that the unemployment rate remains on the high side for engineers, who historically have had 1- to 2-percent unemployment, and during the 1960s enjoyed full employment, at a below-1-percent jobless rate. In the second quarter of 1995, it was 2.5 percent for all engineers and 2.7 percent for EEs.
Oracle ITV software respun for Internet
REDWOOD SHORES, Calif -- Oracle Corp. is revamping its Media Server software, originally designed for interactive TV, to plug into the Internet and enable a new generation of low-cost terminals for business and consumer users. The devi
ces reportedly will rival the features of today"s X86 and Windows-based PCs but for just a few hundred dollars. The first of many platforms the company hopes to spin based on the technology will be billed as a Hyptertext Markup Language (HTML) terminal, to be launched in March.
Oracle is working with Japanese and Korean consumer-electronics companies, who will make the $500 terminals, though Oracle is initially designing reference systems to work with its server software. The company is also working with Apple Computer, one of its key partners in ITV products. Indeed, the resulting designs of low-cost desktops resemble set-top boxes Oracle has fashioned for its Media Server software.
"You can think of this as the merger of ITV and the Web," said Andy Laursen, who heads Oracle's New Media Division. "The systems will really be very much like set-top boxes."
Semiconductor industry is in a boom cycle
PALM SPRINGS, Calif. -- Semiconductors will grow 36 percent in 1995, to nearly $150 billion, and will rise 22 percent in 1996, to $182 billion, market-researcher Dataquest Inc. reported last week.
At the company's annual Semiconductor Conference, Dataquest's chief of semiconductor research, Gene Norrett, said that barring any sudden political changes that affect the economy, he sees continued growth in the sector for at least three years.
"Never before have we seen so many positive signs," Norrett said.
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