EET-i Top of the News
Week of July 31, 1995
- August 3, 1995
 Microsoft seeks MITV help
- Pilkington preps reconfigurable video DSP
- At Siggraph: Lights! Camera! Digital action!
- Worx conferencing goes multipoint
- Harris pushes A/D envelope
What's new(s) at EE Times-interactive
- August 2, 1995
- Hybrid microwave IC due
- Xilinx upgrades FPGA line
- Endangered ATP earmarks $60M for 24 R&D projects
- No power cut for Taiwan fabs
- August 1, 1995
- Startup to produce millions of new electronic materials
- Confab sees new VLSI neural systems
- Hit
achi integrates video processing chip set
- TI, Sheldahl team on BGA packages
- Summit announces Visual Verilog for ESDA
- July 31, 1995
- Sega to port to PCs with Nvidia chip, bypassing Microsoft
- EDA delay standard held up by Synopsys, Cadence
- Intel to add multimedia muscle to P6
- TI pushing multiprocessor DSP to replace dedicated chip sets
- Vitesse pushes GaAs process
- Intel reveals it's been shipping desktop PCs to Toshiba
- Finally, digital TV for Japan
- Chip-capacity squeeze for real, say executives
Other news sources on Techweb:
Microsoft seeks MITV help
By
Rick Boyd-Merritt
TAIPEI, Taiwan -- Microsoft Corp. is quietly recruiting syst
ems integrators, OEMs and software developers in Asia for its planned Microsoft Interactive TV (MITV) software program. Prototype systems are expected to be available by year's end.
Under an OEM partner program called Insight Intelligence, the Redmond, Wash., software giant is seeking systems integrators it can qualify to install its end-to-end ITV software system, as well as OEMs that could build hardware, such as set-top boxes, based on its recommendations. It has even formed a separate division to do the recruiting.
Designed to leverage the existing infrastructure built on Windows and Windows NT, the MITV operating system supports a portion of Win32 code for Windows NT, shares a subset of Windows 95 Games API and employs a distributed implementation of Microsoft's Common Object Model (COM) for sending objects over networks.
In addition to the strategic alliances announced earlier this year with four set-top-box vendors--Hewlett-Packard, Sony, NEC and General Instrument--Microsoft is seeding its As
ian partners with specifications for suggested reference set-top and server platforms for its software, much as its PC OEM group provides basic specs for suggested PCs for Windows 3.1. Those hardware specs, however, are not expected to be made public until late in 1996.
Pilkington preps reconfigurable video DSP
By
Peter Clarke
NORWICH, England -- With the design nearly complete on a DSP chip that combines reconfigurable and parallel processing for video compression and decompression, Pilkington Microelectonics Ltd. (PMEL) has launched licensing discussions with semiconductor makers.
Designers of the chip said it can work with almost any algorithm, including Moving Picture Experts Group (MPEG) standards or fractal-based algorithms. It also will be able to receive the algorithms as configuration data from the same sources as its video stream
s. That could allow a single set-top box to be used with multiple compressed data streams and adapt over time as successive standards are introduced.
Ken Austin, vice chairman of PMEL, would not discuss potential partners for what he is calling the "Virtual DSP."
At Siggraph: Lights! Camera! Digital action!
By
Nicolas Mokhoff
LOS ANGELES -- The Hollywood establishment may be taking it on the chin soon, if the latest digital-production-studio developments at this week's Siggraph become low-cost equivalents to the traditional techniques used to make big-budget films like the $200 million "Waterworld."
Digitial Studio '95, a demonstration suite of off-the-shelf products available to all production professionals, will provide an overview of collaborative work among those who produce, manage, distribute and archive digital imagery. It will
be tied together via a GraphicsNet LAN running video among the essential hardware components that make up a digital-studio production house. A LAN-to-WAN bridge will have access to other studios via Pacific Bell switches.
As visitors tour content creation, approval, distribution and archiving, they will be shown how a digital process increases productivity and quality.
Worx conferencing goes multipoint
NEW YORK -- AT&T WorldWorx personal conferencing systems has passed another milestone with AT&T's release of its multipoint service, which allows voice, video and data sharing among multiple PC users.
Using release 2.0 of the Vistium Personal Video software, as many as six WorldWorx subscribers can now engage in multipoint conferencing. Users can mark up documents on the screens while talking and seeing each other. The systems adhere to the H.320 video and audio conferencing sta
ndard and are expected to be compatible with the document and data-sharing features of the T.120 standard.
Compatibility with the full T.120 standard is expected in the first half of '96, as are products from AT&T's partners. The company is working with Apple, IBM, Intel and Sun Microsystems to have those vendors offer videoconferencing systems that will be compatible with WorldWorx. The system now supports ISDN-type transmission rates (112/128 kbits/second).
Also last week, AT&T put up a World Wide Web site that deals with
WorldWorx
.
Harris pushes A/D envelope
By
Ron Wilson
MELBOURNE, Fla. -- Taking on entrenched competitors in the instrumentation-quality analog-to-digital (A/D) converter business, Harris Corp.'s Semiconductor Sector has announced what it calls "a new class of A/D conv
erter, rather than an incremental improvement." The capabilities and specifications of the new 16-bit part appear to justify that claim.
The most obvious feature of the HI7188 is that it combines high throughput, sigma-delta conversion and an integrated eight-channel input multiplexer--generally considered to be mutually exclusive characteristics. The company claims the part will deliver 240 samples/second/channel with 96-dB dynamic range and no missing codes.
It does this through a unique filter architecture and a well-thought-out on-chip digital sequencer. Harris claims that you just tell the chip what you want it to do, and you get back correct data--far from the case in devices with external multiplexers, with long settling times when the input is changed or in chips without autocalibration.
Hybrid microwave IC due
By
George Leopold
WASHINGTON -- A new class of microwave IC developed by TRW Inc. integrating two types of transistors and different semiconductor materials could eventually be used to shrink the size of commercial wireless products.
On one GaAs or indium-phosphide chip, the Redondo Beach, Calif.-based company has combined low-noise high-electron-mobility-transistor (HEMT) amplifiers, frequently used in receivers, with low-distortion heterostructure bipolar transistor (HBT) devices, often used as power amplifiers in transmitters. The result, the company said, is a family of ICs that reduces the number of parts in an integrated microwave assembly by a factor of 30.
While the hybrid ICs initially will be used internally for space and airborne applications, the single-chip solution could eventually help commercial wireless-applications designers in their miniaturization efforts, TRW officials said. For now, however, the transition from development to production depends largely on internal demand from systems builders, sa
id Dwight Streit, TRW's principal investigator for HEMT/HBT research and development.
Xilinx upgrades FPGA line
By
Ron Wilson
SAN JOSE, Calif.-- Xilinx Inc. has boosted speed and added architectural features to the industry's largest-selling FPGA family, the XC4000s. But the most significant change could be a price reduction of up to 50 percent in the new family compared to the corresponding XC4000 chips.
Combining a new 0.6-micron, three-metal process with revisions in SRAM and logic cell structures, the company claims an immediate 30 percent increase in speed for existing XC4000 designs, and greater than 50 percent improvements in the near future.
According to Xilinx product-line manager Barry Chaffin, the XC4000E family is being sampled in the new 0.6-micron process. By the end of the year this process will migrate to 0.5 micron, a
nd development is under way with Xilinx foundries for a 0.35-micron four-metal process in 1996. These process changes produce more dice per wafer and hence, lower prices.
Endangered ATP earmarks $60M for 24 R&D projects
By
David Lieberman
and
George Leopold
WASHINGTON -- As Republican lawmakers work to dismantle the Advanced Technology Program, it is about to begin what could be its last great act: 24 R&D projects, including three in electronics and one in computing and information processing, for which the ATP has committed $60.5 million in cost-sharing funds for 1995.
The charter of the ATP, which is administered by the Commerce Department's National Institute of Standards and Technology, is to help fund "high-risk R&D projects with the potential to spark important, broad-based e
conomic benefits for the United States," according to a Commerce Department spokesman.
The ATP program was hit hard in the House, which denied the entire fiscal 1996 budget request of $491 million. A rescission bill eliminating fiscal 1995 funds already approved by Congress cut an additional $90 million from ATP, leaving $340.7 million. The Senate has not acted on the ATP budget request but some of the funds could be restored when budget conferees meet later this summer.
One of the recipients of new government cost-sharing largesse is a multi-disciplinary team led by field-emission display specialist FED Corp. (Hopewell Junction, N.Y.). The goal is the componentized computer, or what Susan Jones, FED's executive vice president, dubs "the smart display." The project, budgeted at $15,575,000, will have half of that provided by public funding.
No power cut for Taiwan fabs
By
Mark Carroll
HSINCHU, Taiwan -- To ease anxiety over fab expansion here, the government will exempt new fabs at the Hsinchu Science Based Industrial Park (SBIP) from a potentially crippling rationing plan this summer.
That exemption represents a reversal of the Taiwanese government's protocol in which new fabs were expected to reduce their power consumption by 70 percent, according to TI-Acer vice president R.T. Lo. Taiwan Semiconductor Manufacturing Corp. (TSMC), TI-Acer and Vanguard International were looking at severe power constraints at their newly opened production lines.
A March 1 government ruling said that existing facilities that expand their power demands by 1,000 kW would be treated as new facilities. Lo said such a severe cutback would have put a major strain on any fab's ability to meet customer demand. After negotiations between the affected companies and the government, it was decided that for the "economic welfare" of Taiwan, those companies would
be exempted from "new firm" status and would be able to operate at the 10 percent reduction imposed on the majority of companies in the SBIP. Lo said contracted orders can be easily met operating at that level.
Startup to produce millions of new electronic materials
By
Chappell Brown
PALO ALTO, Calif. -- Symyx Inc., a biotech spin-off being formed here, hopes to transfer to the field of electronics a successful automated materials-discovery system used in genetic engineering.
The new system, being perfected by one of its founders in work at the University of California at Berkeley, will synthesize up to 100,000 compounds on a single substrate and then test for desired electronic properties such as superconductivity or magnetoresistance. The substrates will then be archived in a vast materials "library" that can be searched when requirements f
or new materials arise. Similar automated synthesis and test systems are beginning to transform biotech fields such as DNA analysis and drug design, said Issy Goldwasser, Symyx's CFO.
"These new 'combinatorial' methods have attracted hundreds of thousands of dollars to biotech enterprises, and we are expecting the same thing to happen here with the automation of the search for new electronic and optical materials," said Goldwasser. "With current experimental techniques, you are just shooting blindly at a barn, hoping to hit something. This new system will be more like launching a missile."
Confab sees new VLSI neural systems
By
R. Colin Johnson
WASHINGTON -- Several new VLSI chip designs implementing neural networks in silicon surfaced here at the World Congress on Neural Networks, held July 17-21. Only one exhibitor showed a new product--a
genetic-based software add-on for spreadsheets--but many improvements in existing commercial systems were reported. And the conference was kicked off with a description of new attempts to locate higher-level structures such as concepts in the neural circuitry of the brain--a task crucial to more sophisticated applications of neural-network technology.
President of the sponsoring organization, the International Neural Network Society, and a professor at Kings College (London), John Taylor, delivered the first plenary session imploring researchers to investigate semantics (meaning), rather than just syntax (function).
Taylor described his latest collaborative work investigating the "location" of concepts in the brain, pointing out that still no one knows how to locate them. For Taylor, concepts are brain states that he terms "virtual actions."
He explained, "Our concepts are a sort of virtual action that takes place before our motor systems act them out."
Hitachi integrates video processing chip set
By
Ron Wilson
BRISBANE, Calif. -- While a great deal of attention has gone into the back-end processing for videoconferencing--H.261 encoders and decoders, for instance, and network adapters clean enough to carry two-way video transactions--no one has paid a lot of attention to the front end. In typical computer-industry fashion, we have mostly just postulated the existence of a high-quality, digital-video signal.
But as anyone who has worked with color charge-coupled devices (CCDs) is aware, there's many a slip between charge and chip. CCDs do not automatically yield stable, well-conditioned CCIR601 digital video. They give you noisy, unsynchronized digital stuff, and they expect you to control things like the timing, the aperture of the lens that is providing the image to them, and so forth. The camera subsystem, in short, is an interesting
mixed-signal design in its own right.
Hitachi America Ltd.'s Semiconductor and IC division had previously addressed this problem with a six-chip set about a year ago. Now the company has done some further integration, coming back with the HMM492xx chip-set family, which includes just four devices. Starting from the front, the chips are an analog bipolar device that does sampling and automatic gain control, your choice of a 9-bit or 10-bit video A/D converter, a special-purpose DSP chip and an 8-bit microcontroller.
TI, Sheldahl team on BGA packages
By
Ashok Bindra
NORTHFIELD, Minn. -- Identifying ball-grid arrays (BGA) as the next emerging high-performance package type for advanced semiconductor devices, Sheldahl Inc. is jointly working with Texas Instruments Inc. to develop a variety of BGA packages based on its Viagrid microsubstrate inter
connect technology. In this partnership, Sheldahl will provide its polyimide-film-based Viagrid substrate interconnect, while Texas Instruments will do the assembly of the die in the package.
"The merging of Sheldahl's Viagrid with TI's IC packaging expertise will provide the marketplace with a greatly enhanced package, allowing the two to realize significant market gains," said Larry Lemke, director of Sheldahl's Micro Products Division. According to market research firm Techsearch International Inc. (Austin, Texas), the demand for BGA packages will be approximately 17 million in 1995, and grow to 41 million in 1997. Besides enabling the best cost/performance solution, this collaboration will also provide TI with an opportunity to reduce engineering and development expense associated with new packages, said Joe Brennan, assembly and test operations manager of TI's Application Specific Products Group in Dallas.
Summit announces Visual Verilog for ESDA
By
Richard Goering
BEAVERTON, Ore. -- Creating an electronic-system-design-automation (ESDA) product based fully on Verilog, Summit Design Automation has announced Visual Verilog, a companion product
to its existing VHDL-based Visual HDL. The product offers a tight interface to the Verilog-XLsimulator from Cadence Design Systems.
While Visual HDL generates both VHDL and Verilog code, its semantics, syntax and database all are based on VHDL, noted Dan Skilken, Summit's vice president of worldwide marketing. Further, the simulator in Visual HDL is VHDL-based. Visual Verilog, however, replaces that VHDL-based simulator with the Verilog-XL interface, and its semantics, syntax and database are redesigned for Verilog.
Visual Verilog is the result of a technology agreement with Cadence and, with its extensive graphical-debugging capabilities, claims to provide a deeper level of integration with
Verilog-XL than would be achieved with a traditional Cadence Connections program interface.
Sega to port to PCs with Nvidia chip, bypassing Microsoft
By
Brian Fuller
and
Ron Wilson
SUNNYVALE, Calif. -- Sega of America Inc. and Nvidia today will announce that Sega will port some of its key videogames from the 32-bit Saturn system to PCs using Nvidia's multimedia chip. The exclusive agreement will give Sega a second beachhead in the Pentium PC market and will bring Nvidia much-needed applications. But it also bypasses Microsoft's much-touted Game Software Developers' Kit (Games SDK), raising questions about Microsoft's effort to finally bring high-performance graphics applications under the Windows 95 umbrella.
The games being ported are some Sega-written first-generation titles currently running on the Satu
rn system, according to a Sega spokesperson. Sega has previously announced that many of its 16-bit games for earlier consoles will be ported to run under Windows and native signal processing (NSP).
The agreement gives a major boost to Nvidia, which announced its NV1 Multimedia Accelerator in the spring. The Nvidia chip was the first to combine high-speed 3-D rendering and texture mapping with GUI acceleration, wavetable audio and video-playback acceleration. But competitors criticized the chip, saying its unique quadratic texture mapping (QTM) approach to 3-D rendering made it incompatible with any existing applications or 3-D APIs.
EDA delay standard held up by Synopsys, Cadence
By Richard Goering
LOS GATOS, Calif. -- A crucial standards effort aimed at delay calculation for deep-submicron ICs has received a boost via the donation of key technology from Synopsys and Cadence Design System
s. But the joint Open Verilog International (OVI)-CAD Framework Initiative (CFI) effort has been slowed by differences between the two organizations over how and when to take the standard to the IEEE.
Although CFI and OVI began work on a delay-calculation standard separately, the technical work is currently centralized under the auspices of OVI. A delay-calculation standard is viewed as essential because ASIC vendors are wasting considerable effort writing separate delay calculators for every EDA tool, and users are hobbled with inconsistent delay calculations.
Andy Graham, CFI president, said what the IEEE really wants is publication rights. "My understanding of the IEEE requirements is not that they require transfer of ownership, but merely the permission to reprint. They haven't asked for that [ownership]. If they did, I suppose we would have to consider the ramifications."
Intel to add multimedia
muscle to P6
By Alexander Wolfe
SANTA CLARA, Calif. -- Intel Corp. plans to drive its P6 microprocessor deep into multimedia territory, adding to future versions of the chip specialized instructions that speed the manipulation of graphics and video, sources close to the company said. Officials at Intel declined to comment.
The initial P6, which is currently available in sample quantities, won't have the multimedia-specific features, the sources noted. However, a beefed-up version that might be ready next year will include new instruction-set entries that could, for example, enable the chip to adroitly assist with the motion-estimation calculations typically required during MPEG-video decompression.
Such capabilities would be a boon for system designers, enabling them to dispense with at least some of the digital-signal-processing hardware now required for full-blown multimedia. Moreover, a multimedia-ready P6 could go a long way toward boosting Intel's native signal processing (NSP) initi
ative. The cornerstone of NSP is that multimedia processing--most notably, MPEG-1 and Indeo decompression--can be performed on the main system processor.
TI pushing multiprocessor DSP to replace dedicated chip sets
By Martin Gold
HOUSTON -- Texas Instruments Inc. is waging a campaign to position its multiprocessor DSP architecture as a single-chip replacement for dedicated chip sets in videconferencing, graphics/imaging and digital switching/networking. To broaden the mass-market appeal of the TMS320C8x family, TI has more than halved the initial chip's price, expanded the development-tool suite and platform options, and notified customers that lower cost and higher performance derivatives are in the offing.
Until last week, TI had released virtually no details on its 320C8x strategy since the family's introduction as the Multimedia Video Processor (MVP) in early 1994. TI spent the time wo
rking on initial implementations with a handful of early adopters.
The company now says it's ready to offer 40- and 50-MHz versions of the original 320C80 silicon in any quantity from single pieces to tens of thousands.
Vitesse pushes GaAs process
By Chappell Brown
CAMARILLO, Calif. -- Vitesse Semiconductor Corp. has devised a 0.5-micron GaAs process that it says will bring digital gallium arsenide circuits close to the integration levels of CMOS and BiCMOS. Vitesse is betting on the process, called H-GaAs IV, to put million-transistor, microwave-performance GaAs circuits in the running for design slots in such applications as telecommunications and test instrumentation.
The movement of digital GaAs into the VLSI arena now dominated by CMOS reopens the debate on what role the higher performance technology might play in the speed-hungry communications revolution. Rather than speed, Vite
sse is emphasizing the critical issue of cost.
"We can easily beat silicon on speed alone, but the real issue in capturing new markets is lower cost," said Vitesse president Lou Tomasetta. "In essence, given any frequency range, we can come in with a part that consumes less power--a key cost consideration, due to the expense of packaging."
Intel reveals it's been shipping desktop PCs to Toshiba
By
David Lammers
and
Rick Boyd-Merritt
TOKYO -- Spotlighting its keen interest in architectural and channel control, Intel Corp. last week acknowledged it has been providing Toshiba Corp. with desktop PCs since May. The Toshiba alliance, announced here, represents another coup for Intel's expanding systems operation, the Hillsboro, Ore., group said to be on track to make 10 million motherboards this year in p
lants in Ireland and Puerto Rico and at subcontractors in Malaysia.
A Toshiba spokesman said Intel has supplied three types of PCs, all running the IBM-compatible DOS/V operating system.
For Toshiba, the deal suggests a strategy designed to stay on top in the worldwide notebook business as the Intel desktops fill out Toshiba's computer product line in Japan. In the 1994 fiscal year, which ended March 31, 1994, Toshiba's desktop presence was only about 38,000 systems. This fiscal year, Toshiba hopes to hit 120,000 units.
The Toshiba deal is not the first time Intel has sold complete systems, but it does reveal the chip giant's growing PC-manufacturing prowess. The operation has irked OEMs that are major Intel CPU customers.
Finally, digital TV for Japan
By
Junko Yoshida
TOKYO -- Japan, long the lone analog holdout in the wholesale shift
to digital standards for high-definition TV, accepted the inevitable last week as the Ministry of Posts and Telecommunications (MPT) announced the nation's first digital-TV broadcast specification. The spec covers the technical implementation of digital communication satellite services, which are slated to start in April.
The guidelines mandate such widely embraced technical elements as MPEG-2 Main Level, Main Profile for compression; quadrature phase-shift keying (QPSK) for modulation; and MPEG-2 Transport for the transport layer. The spec thus is "very similar to [that] set by Europe's Digital Video Broadcast (DVB) Project," said Tomofumi Yasunari, director of MPT's Digital Broadcasting Systems Division.
Yasunari added that the spec "will provide a fundamental framework for Japan's digital-broadcast services in the future" for cable and terrestrial services as well as satellite transmissions.
Chip-
capacity squeeze for real, say executives
By
Alexander Wolfe
SAN JOSE, Calif. -- Semiconductor-industry leaders last week sounded capacity alarms, warning that chip manufacturers won't be able to meet demand any time soon.
"Most, if not all, of our customers are asking for more parts than we can supply," said Kevin McGarity, senior vice president of Texas Instruments Inc.'s Semiconductor Group. "We are basically out of capacity" through the third quarter, with tight supplies expected to continue beyond then, he added.
McGarity spoke at the 1995 Semiconductor Conference, here, sponsored by investment bankers Robertson Stephens & Co.
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