EET-i Top of the News
Week of June 19, 1995
- June 22, 1995
 40-in. plasma display in works
- Motorola to customize ATM
- Cirrus unwraps Rambus graphics line
- Panda Project touts flexible architecture
- FCC issues proposed digital-radio guidelines
What's new(s) at EE Times-interactive
- June 21, 1995
- VR on the Net: Too costly for prime time?
- Japanese firms fear weak '95
- Asia holds key for Japanese
- Madge acquires Lannet
- Robot 'evolves' without programming
- Sandia Labs seeds 3-D microstructures
- June 20, 1995
- DOE to spend $1 billion o
n supercomputing project
- X station hosts 24-bit color
- Ziatech's first Compact PCI card is a mezzanine board
- New drive technology eliminates wires
- EDIF expands pc-board CAD, test effort
- June 19, 1995
- Davic firms up its digital set-top spec
- Task force defines U.S. infobahn-security role
- Foreign semi share slides in Japan
- Sematech ponders aid for EDA world
- Chip-scale packaging gains adherents
- New formal verification tools open new realm
- New consortium seeks standard for reprogrammable logic language
- World's first evolved neural network results in startling discoveries
- Philips to adopt common consumer electronics platform
Other news sources on Techweb:
40-in. plasma display in works
By
Yoshiko Hara
TOKYO -- Japan Broadcasting Corp. (NHK) has developed a 40-inch-diagonal plasma display prototype that it says comes close enough to CRT performance to make it viable for high-definition TV applications. The display, shown at an NHK laboratories open house here, delivers 150 cd of brightness and an expected life of 10,000 hours.
NHK is working with Matsushita Electronic Corp. to refine the display for use in a TV that the latter company plans to bring to market by the end of the first quarter.
"The lifetime and brightness of the display now are almost comparable to that of CRTs, qualifying it for practical use," said Shuichi Morikawa, executive director general of engineering at NHK Sci
ence & Technical Research Laboratories.
Motorola to customize ATM
By
Loring Wirbel
PHOENIX -- Motorola Semiconductor Products Sector's Asynchronous Transfer Mode (ATM) program, conceived as a standard-product chip set coming out of the Austin, Texas, data-communications division, has been recast as the first offering from a new operation here: the Customizable Standard Products (CSP) group. While CSP will offer traditional standard products, its focus will be on providing user-specific logic (USL) blocks, configured as gate arrays or megacells, surrounding a predefined communications core.
This summer, Motorola will introduce a cell segmentation/
reassembly (SAR) core for ATM network-interface card designs, as well as a cell-processor core for ATM line-card designs. Digital-video broadcast cores will be the second target market for C
SP, with quadrature-amplitude-modulation modems and Viterbi and Reed-Solomon encoder cores slated for a late 1995 release. Fiber Channel controllers and physical-layer devices will be the third target market for CSP.
Phil Grove, market-development manager for CSP, said that the rapid pace with which ATM standards change through the ATM Forum convinced Motorola that OEMs needed a design that was quick to optimize. While several ASIC vendors have looked at MIPS or ARM RISC cores for SAR and cell-policing functions, Grove said it was important to develop efficient, low-cost ATM cores that do not carry a high baseline price.
Cirrus unwraps Rambus graphics line
By
Ron Wilson
FREMONT, Calif. -- Cirrus Logic Inc. will on Monday unveil its architecture for high-end multimedia graphics controllers, showing an entirely new Rambus-based design that ev
entually will include graphics, video, 3-D and communications functions. By combining a redesigned pixel engine with a Rambus frame buffer, the company claims that the GD546X family will move into parity with, and then surpass, other high-end GUI offerings in performance and affordability.
"I think the initial part, with a single Rambus channel, will equal the S3 968 in performance," said Cirrus marketing manager Tom Kao. "Future parts in the family will have dual Rambus channels, giving us a frame-buffer bandwidth of 1 Gbyte/second. Those parts should be the fastest in the industry."
Kao said the graphics engine, designed to run synchronously to the Rambus interface, had been redesigned from previous Cirrus pipelines. The new hardware is capable of high-speed drawing and block-line transfer (BLT) operations, color-space conversion, and X and Y bilinear interpolated scaling of video images. It also can maintain three independent, arbitrarily occluded live video windows on the screen.
Panda Project touts flexible architecture
By
Ashok Bindra
NEW YORK -- The Panda Project, a three-year-old company founded by ex-IBMers, unveiled a novel computer-system architecture at PC Expo earlier this week that is expected to profoundly affect the design and manufacture of servers and workstations. For the first time, interconnect and packaging technologies play a vital role in designing a system touted as processor-independent, expandable to 256-bit data buses and modular to allow peripheral, memory and I/O system configurations to meet users' needs.
"It is a flexible computer architecture that is crafted with the future in mind," said Stanford W Crane Jr., president and CEO of The Panda Project (Boca Raton, Fla.). Based on the architecture, the company has developed a server and a workstation, called Archistrat 4s and 4b, that will be available in limi
ted quantities next quarter, with production slated for the fourth quarter.
While the first introductions are based on the Pentium, systems that incorporate PowerPCs and Alpha chips also are being readied. And multiprocessor systems are in the works.
The Panda Project has created a swing server architecture that will erase the processor bias in today's server market, said Brad Day, director and principal analyst for worldwide client/server computing at Dataquest Inc. (San Jose, Calif.). The Archistrat systems have all the elements needed to penetrate the competitive server market, said Day, adding that the passive-backplane technology gives Archistrat an edge.
FCC issues proposed digital-radio guidelines
By
George Leopold
WASHINGTON -- Satellite digital radio moved a step closer to reality with the issuance of proposed government guidel
ines for getting the service into orbit. But as it attempts to launch a nationwide satellite digital-audio-radio service (Dars), the Federal Communications Commission (FCC) faces heated opposition from local AM and FM broadcasters, who view satellite radio as a threat to their existence.
The commission released proposed rules and policies for satellite Dars on June 15, initiating the final rule-making phase before the FCC can begin issuing operators' licenses. So far, four companies have applied for the licenses.
VR on the Net: Too costly for prime time?
By Gail Robinson
MOUNTAIN VIEW, Calif. -- To most people, the rise of three-dimensional interfaces for browsing the World Wide Web conjures images of a worldwide community of Net surfers strapped into fully immersive virtual-reality gear and interacting, without any space limitations, in cyberspace.
Silic
on Graphics Inc.
software engineer Gavin Bell, who led the team that developed the 3-D graphical standard for the Internet known as the Virtual Reality Modeling Language (VRML), recently acknowledged that such an environment is "technically feasible," but added that "there are some barriers to hooking VR systems to the Net--not the least of which is cost."
While Bell expects to see VR-based browsers coming out of research soon--perhaps at the IEEE Siggraph conference in August--he noted that the number of Internet users with access to the equipment would be too small to justify the investment in building them.
Even building networked 3-D representations on 2-D CRTs proved to be a formidable task. "It's fairly obvious that the three-dimensional representation of a room contains vastly more information than a two-dimensional floor plan," he noted.
Two years ago, when an ad hoc committee was formed at the First International Conference on the World Wide Web to broach the idea of a 3-D graphical stan
dard for the Internet, Bell recognized one of those defining moments in the development of new information technology. The committee was inspired by visions of full 3-D browsers that would lift popular 2-D graphics interfaces, such as Mosaic, off the plane and into true three-dimensional cyberspace. The first step toward that vision would be VRML.
Japanese firms fear weak '95
By
David Lammers
TOKYO -- Japan's largest electronics companies are worried about 1995 and beyond, concerned that demand at home is weakening, and that competition from South Korean competitors will take the profits out of various products, including LCDs. As the big companies move production offshore to cope with the high yen, the smaller electronics companies--the
shitauke
infrastructure of suppliers and subassemblers--face red ink and bankruptcy unless they h
ave the technical strength to combat competitors in Asia.
One encouraging sign is that most of Japan's consumers don't appear to be scared off by the events of early 1995: the yen's 15 percent appreciation, political instability, trade friction with the United States, as well as calamities such as the Kobe earthquake and violence by the Aum cult.
Most worrisome is that overall unemployment is inching past the 3 percent mark, and Japan's largest electronics companies plan to cut their hiring plans for next April, when university graduates begin working. NEC Corp., for example, plans to reduce the number of university graduates it will bring on board next April.
Asia holds key for Japanese
By
David Lammers
TOKYO -- Japan is focusing on Asia with increasing intensity, eyeing it as an export market for components made in Japan and as a wa
y out of the cost crisis brought on by the yen's sharp appreciation this year. Asian countries now take in nearly twice as many of Japan's semiconductors as the North American market, partly because Japanese companies have vigorously moved production offshore.
Semicon Research Ltd., a Tokyo-based consultancy headed by Osamu Ohtake, surveyed 19 Japanese companies about their semiconductor exports to nine countries in the region: China, Hong Kong, South Korea, Malaysia, the Philippines, Singapore, Taiwan, Thailand and Indonesia. In 1994, chip exports increased 31.7 percent to 922 billion yen, or $9.302 billion.
"The Asian market is becoming the center of the world," Ohtake said. "Consumer-electronics production, information equipment such as computer peripherals, are showing very high growth rates. Many of the fastest-growing electronics companies in the world are local Asian companies, and investment in Asia by European and American companies is also growing quickly."
Madge acquires Lannet
By
Loring Wirbel
SAN JOSE, Calif. -- The roster of independent LAN-switching companies continued to consolidate this week, as global token-ring leader Madge Networks N.V. acquired Lannet Data Communications Ltd. (Tel Aviv, Israel) for the latter's expertise in Ethernet switching architectures. Madge will treat the acquisition as a pooling of interests, issuing new Madge shares for all existing Lannet shares at a price of $27.50 per share, or roughly $300 million overall.
Madge chairman Robert Madge said that the combined company will retain some 40 offices in 20 nations, including facilities with more than 200 employees in Israel, the United Kingdom and the United States. The merger will create the fifth largest internetworking company in the world, Madge said.
Robot 'evolves' without programming
By
R. Colin Johnson
GRANADA, Spain -- Field-programmable gate arrays (FPGAs) under the control of a genetic algorithm have become the first self-evolving hardware system, according to its creator, University of Sussex researcher Adrian Thompson.
Described here at the European Conference on Artificial Life (ECAL) earlier this month, the self-evolving FPGA component is part of a control system for a mobile robot that "evolves" new behaviors rather than being programmed for a task.
"I am investigating how brains could evolve if instead of proteins they had available to them transistors, resistors, capacitors and wires," Thompson said.
There was no programmable software within Thompson's robot. Instead, its sonar sensors were hardwired to the FPGA's inputs and correspondingly its outputs were hardwired to the wheeled robot's effectors. Then a genetic algorithm evolved different FPGA inter
nal configurations, at each step measuring results and keeping improvements while removing changes that worsened performance.
Sandia Labs seeds 3-D microstructures
By
Chappell Brown
ALBUQUERQUE, N.M. -- The vision of automated microscopic-sized engines and actuators performing work at micron dimensions has tempted researchers around the world for the last decade. But, while a variety of micromotor and microactuator prototypes have been fabricated, the bread-and-butter devices of current micromachine technology are essentially passive components, such as sensors.
In an attempt to address the full potential of microelectromechanical systems (MEMS) design, a research program at Sandia National Labs has initiated an aggressive program to push micromachine capability into full three-dimensional machine design. The program has developed a three-
layer silicon process that can define intricate three-dimensional structures with moving parts, a prerequisite for true mechanical designs that do useful work.
"While microelectronics has generated an explosive growth in tools for microfabrication, the technology is essentially planar," explained Paul McWhorter, director of Sandia's Micromechanical Development Laboratory. "A viable machine technology requires a third dimension; otherwise, what you can actually accomplish will be extremely limited. And while true machine parts that can do work have been demonstrated, it is still an open question whether they will perform any useful functions," he added.
DOE to spend $1 billion on supercomputing project
By
Alexander Wolfe
WASHINGTON -- The U.S. Department of Energy (DOE) is poised to spend almost $1 billion over seven years to fund domestic deve
lopment of a teraflops-class supercomputer capable of executing well beyond 1 trillion operations/second. The DOE has posted documents outlining the little-known effort--called the Accelerated Strategic Computing Initiative (ASCI)--on the World Wide Web.
An initial ASCI contract in the $30-million range could be disclosed as early as next month, industry sources said. That award would buy what's likely the largest and most powerful system built to date: a massively parallel computer with at least 2,000 processors, for delivery in the second half of 1996, offering 1-Tflops peak (though not sustained) performance on selected applications software.
"There's a lot of excitement about the possibility of building a teraflops machine," said Jack Dongarra, a supercomputer benchmarking guru who is a professor of computer science at the University of Kentucky. Such a system would triple the peak rating that's been achieved so far: 338 Gflops for a jerry-built combination of two Intel Paragon XP/S systems, with 6,
768 processors.
DOE officials declined to comment on ASCI. But public documents and reports from industry experts reveal that the impetus behind ASCI is the DOE's need for enough computational power to run a uniquely post-Cold War application--software that can simulate and predict the behavior of nuclear weapons involved in complex accident scenarios.
For more information, see the
ASCI Web site
.
X station hosts 24-bit color
By
Loring Wirbel
MOUNTAIN VIEW, Calif. -- The latest member of Network Computing Devices Inc.'s HMX family combines the 64-bit MIPS 4600 processor with 24-bit color planes, providing the performance equivalent of graphics workstations at a price point starting at less than $6,000.
John Chun, director of product marketing for graphics X terminals at the company, said HM
Xpro24's 1,600 x 1,200 resolution and 16.77 million-color palette "will move this into the ranks of traditional graphic workstation spaces."
Network Computing Devices is pushing its message of X-terminal affordability into the GIS and MCAD markets, where X terminals have begun to make inroads into fully featured workstations. The company's graphics subsystem is based on four independent 8-bit color lookup tables rather than a single LUT device. For Internet browsing and imaging applications in which resources are shared, Chun said, single LUTs will often display a color map flash, which impinges on overall performance.
Ziatech's first Compact PCI card is a mezzanine board
By
David Lieberman
SAN LUIS OBISPO, Calif. -- The first Compact PCI card out of the chute from Ziatech Corp. is not a standalone board but a mezzanine board for the compa
ny's Pentium-based STD32-bus boards and systems. A 32-bit, 33-MHz graphics board based on a Cirrus Logic GD5434 Super VGA controller chip, the mezzanine will be one of the first boards to be respun at some point as a standalone Compact PCI board, according to Ziatech.
Ziatech's mezzanine move suggest that Compact PCI, the latest flavor of the embedded PC, will play much the same role in the industrial arena as that played by the desktop Peripheral Component Interconnect in the persona-computing realm: It will allow incorporation of advanced capabilities into legacy systems with minimum disruption. Just as PCI coexists with ISA, EISA and Micro Channel in the bulk of PC systems in which it resides, Compact PCI backers Ziatech and Pro-Log Corp. (Monterey, Calif.) bill the new spec as an enhancement--not a replacement--bus for use in the industrial realm.
Like other recent spins of PCI for various operating environments, Compact PCI aims to tap the economies of scale provided by the mass-market PCI componen
ts developed for desktop computing, thereby dramatically improving price/performance for the existing industrial customer base. According to some observers, however, Compact PCI is a solution in search of a problem. Others suggest that the problem it addresses is the vendors', not the customers'.
New drive technology eliminates wires
By
Terry Costlow
HUTCHINSON, Minn. -- Hutchinson Technology Inc. has signed a pact with IBM under which the two will jointly develop a technology for the suspensions that hold the heads in a disk drive, giving disk-drive designers another tool to continue driving down size and cost. The trace suspension assembly (TSA) will eliminate the wires now used on a head, instead putting traces on the suspension itself.
Eliminating the wires will make it much easier to mass-produce suspensions for the emerging Pico heads,
or Pico sliders, which are roughly half the size of the Nano sliders that dominate the market today.
EDIF expands pc-board CAD, test effort
By
Stan Runyon
and
Richard Goering
SAN FRANCISCO -- The widely used EDIF standard is expanding its efforts in the pc-board CAD and test arenas. At the recent Design Automation Conference here, the Electronic Industries Association (EIA) announced a new test technical subcommittee and separately released EDIF 4 0 0, a new version that expands pc-board and multichip-module coverage.
EDIF Test, co-chaired by Lee Shombert and Stephen Fortier, engineering managers at Intermetrics Inc. (McLean, Va.), has set an aggressive goal of publishing a revised standard within one year. The subcommittee is seeking people to take part in the development of the standard.
The inten
t, Fortier added, is to provide a seamless mechanism to extract test-related information from the design process in an efficient and effective manner. Another goal is to develop product information once and reuse that information as required.
The current Test Adjunct Standard is linked to EDIF Version 3 0 0 and supports mappings from logical to physical values, environmental conditions (such as temperature and humidity), reusable sets of vectors, framesand compression mechanisms.
Functionality to be included in the standard includes test requirements, test methods and test strategy. "One of the first issues we'll tackle will be the way test vectors are handled, and whether they should be standardized," Fortier said.
Davic firms up its digital set-top spec
By
Junko Yoshida
and
George Leopold
MONTREUX
, Switzerland -- The Digital Audio-Visual Council (Davic) has completed the first version of its digital set-top specification at a meeting in Melbourne, Australia. Details of the latest round of talks were reported by Leonardo Chiariglione, Davic's chairman, at the International Television Symposium here last week.
Davic has created on three profiles: point-to-multipoint distribution, when users cannot control source materials; point-to-point services, when users have a degree of control over the source; and multipoint-to-multipoint conference-like applications, in which users command full control. Profile 3 is not supported by Davic 1.0.
Details on the cluster of tool sets and grades to be used in each profile require further discussion.
Davic also settled other contentious issues in Melbourne, including the modulation scheme. Modulation for hybrid fiber coax and fiber-to-the-curb supports 64-QAM (Quadrature Amplitude Modulation). It will also support 256-QAM, but a set-top using 256-QAM should al
so comply with 64-QAM.
Task force defines U.S. infobahn-security role
By
George Leopold
WASHINGTON -- A government task force last week proposed a limited federal role in developing security along the information highway.
Releasing a draft report, the Information Infrastructure Task Force's forum on National Information Infrastructure (NII) security also denied that the Clinton administration wants to create a new federal agency to police the infobahn.
Instead, the task force said, it had identified four broad functions that define the federal role in NII security. They are:
Serving as a catalyst to promote private-sector development.
Being "guardian of the public interest," cooperating with other governments, the private sector and public in setting ground rules for NII security.
Supporting private-sector development of techno
logy by funding R&D.
Ensuring that its own automated information is secure.
Sally Katzen, head of the NII security forum and an official in the Office of Management and Budget, said: "We have worked hard to strike the appropriate balance between the federal role as protector of the public interest and the private sector roles as owners and operators of the NII."
Foreign semi share slides in Japan
TOKYO -- Foreign share of Japan's semiconductor market fell nearly 1 percent in the first quarter, to 22.8 percent. Semiconductor Industry Association president Andy Procassini called the decline "disappointing," and Roger Mathus, director of the SIA's Japan office, warned that "two years ago, we had three quarters of declining share, and we don't want that to happen again."
The Ministry of Trade and Industry noted that foreign share has been above 20 percent for six quarters. Non-Japanese
semiconductor companies sold $2 billion worth of product in Japan during the first quarter.
Sematech ponders aid for EDA world
SAN FRANCISCO -- The road map proposed by the Semiconductor Industry Association to Sematech for develop ing design tools for placing up to 80 million transistors on a chip using 0.18-micron technology by 2000 will hit a detour unless the current design-tool development can be accelerated. That was the sentiment expressed by Richard Bushroe, CAD program manager at Sematech (Austin, Texas) at a panel of industry-university relations at last week's Design Automation Conference.
He proposed a new "model for success" in industry-university funding relations that will dramatically change the way university research can be applied to real-world problems. The model calls for forming cooperative project teams of university professors and graduate students to work with Semate
ch company representatives and EDA suppliers on precompetitive advanced research.
"I'm proposing setting up a Strategic University Research Council whose mission would be to provide overall direction, prioritization, coordination, and funding recommendations to industry, universities and standards groups related to precompetitive R&D for EDA," said Bushroe.
Chip-scale packaging gains adherents
By
Terry Costlow
New formal verification tools open new realm
By
Richard Goering
SAN FRANCISCO -- The emerging technology of verification is on the threshold of a brave new world: verification of an original design to ensure its correctness. That's the promise of two formal verification too
ls previewed at the Design Automation Conference by AT&T and Abstract Hardware Ltd. Not only that, but Cadence Design Systems revealed that it has been providing similar technology on a consulting basis.
Formal verification is considered perhaps the most important back-end design technology for catching glitches that aren't apparent by other means.
A research topic for many years, formal verification is being brought into production use as designs grow more complex. Unlike simulators, formal verifiers are fast, exhaustive and require no test vectors. So far, commercial formal verifiers such as Design Verifyer from Chrysalis Symbolic Design (Andover, Mass.) have been used mainly to prove the functional equivalency of two circuit representations.
"Formal tools can find subtle bugs that you cannot predict with simulation," said Patrick Scaglia, vice president of Cadence Berkeley Labs. "Think of an effect that takes a sequence of 10 or 20 states to reach. You'll never catch it with simulation."
New consortium seeks standard for reprogrammable logic language
By Loring Wirbel and Ron Wilson
World's first evolved neural network results in startling discoveries
By
R. Colin Johnson
GRANADA, Spain--The world's first evolved neural network to model not just learning, but the entire developmental process--from egg to a mature brain--was recently demonstrated by Stephano Nolfi, a researcher at the National Research Council, Rome. Nolfi's results encompassed a startling series of breakthrough discoveries here at the European Conference on Neural Networks (ECAL, June 4-6, 1995).
Many researchers have experimented with using genetic algorithms to evolve the architecure of neural networks. The process uses the evolutionary survi
val-of-the-fittest principle to mutate a neural network (a "genotype," to extend the analogy) to create new specific individual neural networks (phenotypes), and then measure whether the newer neural network does a better job than the previous generation. Those that work better are retained, whereas those that perform less well are discarded. After thousands of such random mutations, finally an optimally wired neural network results.
"But every other published researcher just maps genotype information into the phenotype with a process that takes place instantaneously, before the individual starts to interact with the environment," Nolfi said. What Nolfi did instead was to arrange the genotype-to-phenotype step so that embryonic neural networks are created that must then grow to maturity, according their genetic instructions, while interacting with their environment.
"It turns out that the temporal dimension of development has important consequences," Nolfi stated. After analyzing the results of of his
temporally developing neural networks, he made three discoveries. Firstly, that evolution favors neural networks which functionally mature very early in their development cycle.
"Nature forces evolution to be conservative with individuals that mature in the first phases of development," Nolfi explained.
Secondly, and in sharp constrast to the first principle, random mutations that are beneficial are much more likely to occur in the later phases of development. "Evolution plays more freely with individuals that mature later in development," Nolfi said. That is, individuals that mature later end up being smarter than the more prolific, but less intelligent, individuals that mature more quickly.
Thirdly, and most importantly, the vast majority of mutations that are accepted by evolution have absolutely no effect whatsoever on the individual. Nolfi calls these neutral mutations. Why are neutral mutations accepted, since they have no immediate effect? The startling answer is that because many many gen
erations later, they combine with many other neutral mutations to suddenly express themselves together in seeming quantum leaps of evolutionary development. Nolfi calls these seemingly neutral mutations "preadaptations."
Philips to adopt common consumer electronics platform
MONTREUX, Switzerland -- Philips Consumer Electronics soon will announce a strategic plan to adopt a "common platform" for its consumer-electronics line, said Theo Peek, director of Philips Business Electronics in Eindhoven, the Netherlands.
All interactive digital consumer products -- from CD-I and game machines to cable/satellite/terrestrial digital set-top boxes -- will take advantage of the platform.
Alty van Luijt, advanced concept manager of digital video-communication systems at Philips Consumer Electronics, said the company had narrowed its microprocessor choices to just a few, including MIPS and PowerPC.
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