EET-i Top of the News
Week of June 12, 1995
- June 15, 1995
 Lunatic fringe eyes fresh ideas
- Conservatives aim to eviscerate the FCC
- Startup offers generic switch chip-set architecture
- AT&T set taps DSVD spec
What's new(s) at EE Times-interactive
- June 14, 1
995
- Forum: EDA top dogs bark about business
- Keynoter: you say you want a revolution?
- TV rushing into multichannel future
- SDTV seen as way for broadcasters to compete
- Taiwan planting roots in China
- 300-mm-wafer accord urged
- IEEE presidential candidates debate
- June 13, 1995
- Exar, SMI pair
- Multiprocessing for EDA
- Mentor, EEsof in alliance
- Acer Labs takes long view
- AT&T BIST tools
- MPEG in Windows' future
- Cadence aims RTL
- Synthesis falls short when SOS calls
- June 12, 1995
- Pentagon sends commercial signals
- Systems-on-silicon a challenge to EDA
- Group thinks analog spec's easy as ABC
- Mentor buys Exemplar
- Smart EEs are all over the Net
- Alliance unwraps 256-Mbit DRAM
Other news sources on Techweb:
Lunatic fringe eyes fresh ideas
By
Chappell Brown
CHAPEL HILL, N.C. -- It doesn't have the mass appeal of Comdex or the real-world-application focus of the International Solid State Circuits Conference. But for leading-edge-circuit designers, the place to keep abreast of the latest developments is the Conference on Advanced Research in VLSI.
Held annually for the past 15 years at the Massachusetts Institute of Technology or the University of North Carolina, the conference has become a clearing house for what VLSI guru Carver Mead has called "silicon publishing"--the notion that advanced circuit designs are becoming a form of self-expression on a par with the written word. The papers at this year's conference, held here in March, revealed a rich variety of new concepts--all realizable in today's silicon-based technology.
"You can argue about whether or not silicon is the ideal material, but the massive investment in silicon technology gives it a
special status that is difficult to ignore," said Tom Knight, an MIT researcher who contributed to several projects reported at the conference and who chaired a session on circuit design. "In the context of the spectrum of industry conferences, I would characterize this one as the lunatic fringe.
"But if there are any new ideas in the works, this is where you will hear about it first."
Conservatives aim to eviscerate the FCC
By
George Leopold
WASHINGTON -- The sharks are circling and Republicans smell blood as they try to emasculate what many in the telecommunications and computer industries consider the greatest impediment to digital technology's future: the 2,200-employee Federal Communications Commission.
A widely noted proposal from the conservative Progress & Freedom Foundation calls for eliminating the 61-year agency and repla
cing it with a roughly 220-person Office of Communications tucked away in the Old Executive Office Building next to the White House. The foundation, closely aligned with House Speaker Newt Gingrich, wants to bury the FCC within three years.
"To seize future opportunities and economic growth, we must abandon failed concepts of the past," argues George Keyworth, the foundation's chairman and the Reagan administraton's science adviser. "Existing regulatory bodies must be replaced."
Startup offers generic switch chip-set architecture
By
Loring Wirbel
SANTA CLARA, Calif. -- MMC Networks Inc., a startup formed by FDDI architect Amos Wilnai, has defined a generic switch chip-set architecture called ViX, which can be implemented in versions for Asynchronous Transfer Mode cell switching or traditional LAN frame switching. The ATM version is being sa
mpled this summer, and MMC promises to significantly reduce costs of implementing workgroup ATM switches.
Because the buffers for ATM cells come from a common memory pool and are dynamically allocated, rather than assigned on a permanent per-port basis, MMC's network can scale to larger sizes much cheaper than non-blocking switches with fixed port buffer sizes, according to MMC president Prabhat K. Dubey. Nevertheless, the MMC architecture is a true non-blocking switch with advanced features such as per-virtual-circuit queueing. MMC designs can use lower-cost memories for the main buffer pool, such as the 20-ns Toshiba SRAMs used in the MMC demonstration vehicle.
AT&T set taps DSVD spec
BERKELEY HEIGHTS, N.J. -- AT&T Microelectronics has tossed its formidable hat into the Digital Simultaneous Voice and Data (DSVD) modem-chip ring, announcing a four-chip set that should handle most
of the data-and voice-communications tasks in a personal computer.
The set, called Catamaran, handles the usual range of modem and fax protocols, from V.34 and V.32bis down to Bell 103.
But it is the set's audio capabilities, rather than its modem functions, that justify four chips and a premium price.
Catamaran provides audio I/O along with its serial data functions. It complies with Intel's DSVD protocol specification using TrueSpeech at 8.5 kbits/second and with Multi-Tech's Talk Anytime protocol. Using either of those protocols, application software can establish a modem connection and exchange voice signals simultaneously with data over a single line.
Forum: EDA top dogs bark about business
By
Richard Goering
SAN FRANCISCO --In a "dogfight" sprinkled with canine analogies, major EDA-vendor chief executive officers sparred ov
er business and licensing issues at an executive forum at last week's Design Automation Conference here. The executives struggled to pinpoint causes and solutions for anemic growth in the EDA industry.
CEOs from Mentor, Cadence, Synopsys, Viewlogic and ArcSys disagreed frequently over such issues as services-oriented business models, the definition of "value" in EDA tools, the role of startup companies, licensing policies and platform trends. But all agreed that current industry practices and business models need to change.
At least one chief executive officer was unhappy with the direction of the conversation. "I don't like how we spent the last hour and a half," said Aart de Geus, president of Synopsys Inc. "We spent no time on where technology is going. If a session at the Design Automation Conference is devoted to business and pricing models, it's not really the Design Automation Conference."
Keynoter: you say you want a revolution?
By
Brian Fuller
SAN FRANCISCO --Sounding a note of urgency in an otherwise placid Design Automation Conference, a University of California, Berkeley, professor urged engineers last week to take greater risks to achieve the next phase of growth in EDA.
"We are on the verge of a revolution," Professor Richard Newton told the plenary session of the 32nd DAC here in a keynote speech. "But success in any of these areas involves taking risks, taking very big risks."
While the industry is used to taking risks, it needs to go farther out on a limb in areas such as infrastructure investment if it's to continue making gains similar to those achieved in the past, according to Newton.
TV rushing into multichannel future
By
Junko Yoshida
MONTREU
X, SWITZERLAND --Television broadcasters around the world -- whether terrestrial, satellite or cable -- are moving pell-mell into a digital, multichannel universe, the International Television Symposium and Technical Exhibition held here last week demonstrated. But problems remain -- some irrevocably so -- on just how to implement the different digital-transmission standards.
Richard Wiley, chairman of the Federal Communications Commission's Advisory Committee on Advanced Television (ATV) Service, told the symposium that the United States finally has "the ATV finish line in sight."
Tearing down a wall between PAL and Secam broadcasting standards, Europeans have taken a giant stride toward a universal digital-TV standard that could decode and receive a variety of digital services from satellite, cable and terrestrial sources.
SDTV seen as way for broadcasters to compete
By
George Leopold
and
Junko Yoshida
WASHINGTON --Standard-definition TV (SDTV) -- the bridge being erected by federal regulators to hasten the transition to U.S. high-definition TV broadcasting -- appears to be persuading broadcasters to seek access to the 6-MHz channel reserved by the government for digital TV. Terrestrial broadcasters say they view SDTV as a way to compete on the digital front with digital satellite, cable and planned phone-company TV networks.
Indeed, some observers say, SDTV appears to be so closely tailored to broadcasters' competitive needs that the recent opening of the HDTV standard to include lower-resolution SDTV formats -- just months before a final HDTV specification is to be approved -- may have stemmed from heavy broadcaster lobbying.
Broadcasters, regulators and a handful of lawmakers are stressing the need for flexibility in usage of the digital-TV spectrum. Most insist that SDTV is the way to a
chieve it. "I'm a high-definition advocate, [but] spectrum flexibility is something the FCC wanted," Richard Wiley, chairman of the Federal Communications Commission's Advisory Committee on Advanced Television Service, said in defending the panel's recent decision to amend the HDTV spec.
Taiwan planting roots in China
By
Mark Carroll
TAIPEI, TAIWAN --Despite blustering threats from the Chinese government, Taiwan's information technology (IT) industry is increasingly setting up shop in China to maintain its competitive edge, and the business relationship appears capable of weathering the political storms. Analysts do not foresee any danger to Taiwan's offshore production of monitors, keyboards, motherboards, joysticks and other personal-computer staples.
Patrick Selenger, a business consultant living here, said the pragmatism of the Chine
se stands in the way of harm. China needs jobs and investments, and Taiwan-owned companies have made about $17 billion worth of direct investments in China.
A shortage of labor in Taiwan is one of the driving forces behind the move to the mainland. According to figures from the Market Intelligence Center (MIC), a government agency that monitors Taiwan's IT industry, Taiwan's domestic IT industry growth averaged about 19 percent between 1992 and 1994, while offshore production by Taiwanese IT companies averaged 77 percent growth. In 1994, about 21 percent of Taiwan's total IT production was done offshore, and though official figures are not kept, analysts say the overwhelming majority of offshore production is in China.
300-mm-wafer accord urged
By
David Lammers
and
Yoshiko Hara
TOKYO -- U.S. semicond
uctor industry leaders proposed at a recent summit here that Japanese companies join them in forming an international consortium, to be led by Sematech (Austin, Texas), that would bring together device, equipment and wafer manufacturers to deal with the transition to 300-mm wafers. Trade and industry issues were broached at the meeting by the Semiconductor Industry Association (SIA) board of directors and Japanese semiconductor industry executives.
Craig Barrett, the Intel vice president who sits on the boards of both Sematech and the SIA, asked for participation from Japanese companies and got a generally favorable response at the meeting. Barrett and other SIA leaders argued that while SEMI, the Semiconductor Equipment and Materials International group, has taken the lead in hammering out the 300-mm-wafer standard, it is now time for the semiconductor manufacturers to assert themselves. Leading-edge wafers now are 200 mm.
IEEE presidential candidates debate
By
Robert Bellinger
PHILADELPHIA --At one point during last week's debate among the three IEEE presidential candidates, Jan Brown complained that it was difficult to follow the second board nominee, Joseph Bordogna, because their views were so similar.
That pretty much set the tone at the annual debate here, sponsored by the 6,000-member Philadelphia Section of IEEE. The differences among the candidates showed up more in emphasis than as outright disagreement over issues.
Brown is an Austin, Texas, consultant who served on the IEEE board in 1992-93. Bordogna, active in the Educational Activities Board and Technical Activities Board, is a director of the National Science Foundation. They were joined by Charles K. Alexander, the former vice president of professional activities, who is running this year as a petition candidate.
Exar, SMI pair
By
Ron Wilson
SAN JOSE -- Some relationships of convenience have a way of maturing into long-term affairs. That seems to be the case between Exar Corp., a mixed-signal shop here, and Silicon Microstructures Inc. (SMI; Fremont, Calif.).
SMI is a startup in the embryonic business of silicon micromachines. In particular, SMI fabricates force transducers by etching silicon wafers into interesting shapes and then bonding them together to form things like cantilever assemblies. Many of the wafers come from Exar.
It might seem unusual then that Exar -- noted more for the pragmatic management style of president George Wells than for technological end runs -- bought SMI in a stock swap of undisclosed terms.
But, as usual for the low-profile mixed-signal house, there's a pragmatic reason behind the acquisition. It has a lot to do with the automotive market. It turns out that the la
rgest known application for micromachines is as high-reliability accelerometers in automotive airbag triggers. The market is largely owned by Analog Devices Inc. Exar and SMI both thought ADI could be beaten, but neither one could get there alone.
Multiprocessing for EDA
By
Loring Wirbel
SAN FRANCISCO -- Unix-platform vendors at last week's Design Automation Conference displayed a heavy emphasis on parallelized EDA applications for multiprocessing workstations and servers. But in light of the intense competition in hardware-bus throughput and microprocessor-clock speeds, such vendors as Hewlett-Packard Co., Sun Microsystems Inc. and Digital Equipment Corp. are taking different approaches in defining the need for multithreaded and parallelized EDA tasks.
HP introduced its J-series workstations, which combine two-way multiprocessing with high-
performance graphics for desktop applications. The series augments the K-series, a four-way-multiprocessing server family that Mark Canepa, general manager of the Workstation Systems Division, called "the fastest NFS [Network File System] application server on the market, bar none, including anything from Sun or Auspex."
Sun, meanwhile, touted parallelized EDA applications for its existing Sparcstation 20/40 multiprocessing families. It also revealed a program, Project Conan, that seeks to parallelize finer-grained EDA applications such as behavioral synthesis.
Mentor, EEsof in alliance
By
Brian Fuller
SAN FRANCISCO -- Mentor Graphics Corp. (Wilsonville, Ore.) and Hewlett-Packard's EEsof unit have agreed to work together to create a unified design flow in the area of RF and wireless communications.
The alliance, announced last week at the
32nd Design Automation Conference here, will come in two phases and focus on marketing and R&D, executives from both companies said.
Noting the increasing challenges of designing both digital and analog functions into a single piece of silicon, Jacob Egbert, who manages the EEsof unit, said, "Successful companies are those that can handle mixed-signal environments. This is going to allow us to give our customers better value."
The first phase of the agreement will focus on HP EEsof's Microwave Design system and Series IV simulation products with Mentor's MCM Station, Board Station and other front-end offerings using HP EEsof's Intermediate File Format.
Acer Labs takes long view
By
Ron Wilson
SAN JOSE -- Perhaps there is a stereotype about chip-set companies that primarily serve the Far Eastern market. Lean and mean, thinking only of th
e lowest possible cost for their customers' immediate needs. Technology followers. And then there's Acer Laboratories Inc. (ALI).
Not that Acer mightn't look stereotypical on the surface. A subset of the $4 billion Taiwan electronics giant Acer Group, ALI has always been tightly coupled to the needs of its PC-building parent. In fact, Acer Group currently accounts for about 30 percent of ALI's revenue. The company is fabless, relying on TSMC for most of its advanced wafers. And, most of ALI's revenue this year will come from core logic, all of which is currently marketed in the Far East. But go one step farther and the stereotype falls apart.
For one thing, in a market where near-captive, regional companies are almost endangered species, ALI is in overdrive. Chin Wu, president of the labs, puts it in black and white: "We are expecting about $120 million in revenue this year. And we are on a ramp that should maintain 50-percent growth for the next two to three years."
AT&T BIST tools
By
Stan Runyon
SAN FRANCISCO -- As it continues to integrate design-for-test tools into a comprehensive approach, AT&T Design Automation (Allentown, Pa.) is pushing testability up the design chain, keeping up with designers who are shifting to higher levels of abstraction as they pace the move toward submicron ICs.
AT&T's second-generation built-in self-test (BIST) tools, announced here at the Design Automation Conference, take designers to the more generic, vendor-independent RTL level.
As explained by Scott Davidson, technical manager for digital DFT techniques at AT&T Bell Laboratories, "new heights of chip complexity are forcing designers to high-level techniques, and we believe that early design considerations must include testability requirements."
MPEG in Windows' future
By
Junko Yoshida
REDMOND, WASH. -- In the battle to bring video compression to mainstream PCs, Microsoft Corp. has stormed ahead, firing plans to bundle a software MPEG-1 decoder into future Windows 95 and Windows NT operating systems.
The MPEG decoder Microsoft will use comes from an exclusive licensing agreement with Santa Clara, Calif.-based Mediamatics Inc., a leader in MPEG-software technology. The deal is expected to rapidly accelerate the migration of video to the PC, though questions remain on exactly when Microsoft will roll out the technology and what the implications will be for board and MPEG vendors.
Cadence aims RTL
By
Richard Goering
SAN JOSE, CALIF. -- In an attempt to bring floor planning to ASIC design engineers, Cadence
Design Systems has introduced SiliconQuest, a design-planning environment that includes constraint management, register-transfer-level (RTL) and gate-level floor planning, and delay prediction.
While such floor planners as Cadence's Preview are primarily used in conjunction with placement and routing, SiliconQuest is aimed at logic designers using traditional ASIC-design methodologies. "It's essential to bring physical knowledge up into the design space," said Cadence marketing vice president Jim Douglas. "We're bringing the power of placement to the logic designer without making him be a placement and routing jock."
Product marketing manager Donna Rigali noted that floor planning is necessary at 0.5 micron and below to avoid synthesis iterations. She said floor planning makes synthesis more effective because optimization can take physical information into account.
Synthesis falls short when SOS c
alls
By
Richard Goering
Designers struggling to put ever more functionality on single pieces of silicon need strong EDA-tool support. While high-level design tools have progressed to the extent that the design of complex ASICs and ICs is possible, synthesis and verification tools still have a way to go, according to designers working with complex chips.
A synthesis-based design methodology is imperative for systems-on-silicon (SOS) design. But synthesis tools are typically limited to relatively small chunks of logic and may not handle data paths well. The connection between synthesis and layout needs improvement. And though simulation speed has increased dramatically, it's never quite fast enough.
The most significant EDA tool limitations are in the early part of the design cycle, according to Jeff LaVell, director of advanced CAE methodologies at Motorola's Paging Products Group (Phoenix). LaVell's group has been involved in IC designs rangin
g up to 4.2 million devices.
Pentagon sends commercial signals
By
George Leopold
WASHINGTON --Signal processing is emerging as an early recruit in the Pentagon's forced march toward greater use of commercial technologies.
A number of computer upgrades already under way were on display here last week at the Armed Forces Communications and Electronics Association show. Most revisions attempt to integrate what the military considers open architectures such as VMEbus with commercial DSP chips and modules as well as real-time operating systems. Sonars, airborne radars and other processing-intensive systems are the early candidates for performance upgrades.
Despite the successful migration of commercial hardware into weapons systems, however, defense officials warn that the military lags far behind industry in terms of software reliability and de
velopment costs.
Typical of the effort to replace costly military-standard components with less-expensive, more- powerful commercial electronics is a performance upgrade to a Navy sonar called the UYS-1 advanced signal processor. More than 1,800 identify and track submarines. Prime contractor Loral Federal Systems (Manassas, Va.) enlisted several companies, including CSPI (Billerica, Mass.) and Wind River Systems Inc. (Alameda, Calif.), to supply commercial technology projected to deliver a twenty-fold increase in the acoustic signal processor's performance .
Systems-on-silicon a challenge to EDA
By
Richard Goering
and
Peter Clarke
SAN FRANCISCO --If there's a single underlying theme to this week's Design Automation Conference, it's the multiple challenges involved in cramming more functionality onto a s
ingle chip. The relentless drive toward "systems-on-silicon" is reflected in many DAC announcements, and it may well set the pace for the EDA software industry for the rest of this decade.
This year's conference presents new companies and new technologies in such areas as data-path synthesis, power analysis, cycle-based simulation, formal verification and physical design "advisers" (see "Technology Trends," page 53). Those technologies appear to be coming none too soon. Interviews with designers reveal many problems with systems-on-silicon designıincluding a disconnection between hardware and software development, slow verification, limited synthesis capabilities and weak links between layout and logical design.
One leading EDA supplier, Mentor Graphics Corp. (Wilsonville, Ore.), is basing much of its future on a new systems-on-silicon initiative. "We truly believe that in the next few years, systems-on-silicon and the problems related to it will redefine EDA," said Wally Rhines, Mentor's president and
chief executive officer.
Group thinks analog spec's easy as ABC
By
Peter Clarke
MEYLAN, FRANCE --Arguing that extensions to the Verilog and VHDL hardware-description languages do not adequately serve analog engineers, a group is proposing to standardize an alternative approach to mixed-signal description and simulation. Spearheading the effortıdubbed ABCD, for analog behavior C-based descriptionıare Dolphin Integration, based here, and Intusoft (San Pedro, Calif.).
Informal discussions on ABCD are planned for this week's Design Automation Conference in San Francisco. Next month, Charles Hymowitz, vice president of Intusoft, is scheduled to present a paper on the group's goals at the Analog and Mixed-Signal Design Conference in San Jose, Calif.
Mentor buys Exemplar
By
Richard Goering
WILSONVILLE, ORE. --Extending its reach into the Windows-based EDA market, Mentor Graphics Corp. has quietly purchased FPGA-synthesis provider Exemplar Logic Corp. (Alameda, Calif.).
The acquisition gives Mentor a strong position in the strategically important FPGA-synthesis market and complements its December 1994 purchase of VHDL-simulation provider Model Technology Inc. (MTI).
The deal was completed May 31 in a stock swap valued at $25 million. Exemplar joins MTI as a subsidiary under Mentor's new and relatively autonomous New Business Ventures organization, headed by Pepe Piedra, who was president of NeoCad before its recent acquisition by Xilinx.
"This merger provides Mentor Graphics with the largest dedicated team of programmable-logic-synthesis technologists in the design-automation industry, led by synthesis pioneer and visionary Ewald Detjens," said Wally Rhines, president and chief exec
utive officer at Mentor. Detjens, founder and CEO at Exemplar, becomes chief scientist for synthesis at Mentor.
"It's time to bulk up a bit more in the synthesis area," Detjens said. "The wave of synthesis technology just continues to grow, so a massing of people makes sense."
Mentor and Exemplar already had a close technical relationship. Mentor's AutoLogic II synthesis product, announced earlier this year, uses the same VHDL and Verilog language parsers as Exemplar's Galileo tool set. Further, Exemplar resells the MTI VHDL simulator. "The relationship with Mentor went extremely well, so it was natural to come together," Detjens said.
Initial reaction from analysts and competitors was generally positive. Gary Smith, analyst at Dataquest Inc. (San Jose, Calif.), said that Exemplar generated about $3 million in revenue last year, or almost 16 percent of the FPGA-synthesis market. But Exemplar's technology is worth the price, he said."This is a strategic acquisition and an excellent one," said analyst
Ron Collett, president of Collett International (Santa Clara, Calif.). "It further launches Mentor into a rapidly expanding Windows marketplace and gives Mentor additional strength in the expanding FPGA-design market."
"Mentor has just scored another coup," said Rita Glover, president of EDA Today (Phoenix). "By acquiring Exemplar's excellent HDL-based front-end technology, they're creating one of the first industrial-strength synthesis alternatives to Synopsys for both ASICs and PLDs."
But, according to Sanjiv Kaul, director of marketing for design implementation at Synopsys Inc. (Mountain View, Calif.), his company has little to fear. "We are focused on the Unix market. We don't see a threat from either Exemplar or AutoLogic II, and we've competed very well against them."
Complementary move
Though both Mentor and Exemplar sell FPGA-synthesis tools, the acquisition plays off the strengths of both, said Vin Ratford, director of marketing for Mentor's ASIC programmable-logic and test division. "We
believe that both companies together can provide complementary packaged solutions for the second wave of programmable-logic designers who are moving from schematics to HDL design," he said. "These people will be looking for a range of price-performance options on different platforms."
Mentor will continue to offer its Unix-based FPGA Station, while Exemplar will sell Galileo on both PC and Unix platforms. "We don't see any channel conflict because we have been selling to two different sets of customers," Ratford said. "Exemplar customers are very price/performance-sensitive, but they may move up to FPGA Station as their requirements move up."
The purchase reaffirms Mentor's commitment to the Windows marketıa move that was initiated with the MTI purchase. "We think that as Windows NT gets more robust, more and more design problems can be moved to the desktop," said Ratford. "We think that ultimately the final manifestation is a client/server market."
Piedra said that Exemplar will continue to sell bot
h Windows and Unix products and will retain its existing PC pricing structure. Also, existing sales channels will remain intact, but the engineering group will be closely linked to Mentor's organization. Exemplar will also keep existing OEM agreements with FPGA vendors that resell its products, including Altera, AT&T and Actel.
Exemplar's 35 employees will be retained, Piedra said. He noted that Bob Gardner, Exemplar president, will become chief operating officer of the subsidiary. While New Business Ventures so far consists only of Exemplar and MTI, Piedra noted that it is looking at other opportunities and has the independence to develop or buy technology as it sees fit. The division has recently been advertising for Windows development engineers.
Though Exemplar's products are priced lower than those of Mentor, Exemplar clearly has some technology that's of interest to Mentor, starting with the language parsers that are now part of AutoLogic II.
"Exemplar has very strong optimization technolo
gy, and we've been able to use some of that," Ratford said. "They're strong in high-level operators and mapping technology. Exemplar has a reputation for easy-to-use, high-quality products, and we think we can learn a few things from them about how to satisfy the needs of this second wave of designers."
Ratford said Mentor and Exemplar will work closely on generator-driven optimization, as provided by the Exemplar ModGen and Mentor Dynamic Micro-architectural Generation (DMAG) technologies. Eventually, he said, FPGA Station and Galileo might use the same core synthesis technology in such areas as device-specific optimization.
Still, a distinction between these environments will remain. FPGA Station includes a variety of tools, including schematic entry, high-level graphical block diagram entry and VHDL simulation, while Galileo focuses mostly on FPGA synthesis and simulation. FPGA Station also supports migration to ASICs and design and simulation of multiple FPGAs within systems, Ratford pointed out.
The Exemplar purchase will help consolidate and strengthen the FPGA-synthesis marketplace, Ratford said. But most Mentor and Exemplar competitors said they don't think the purchase will have much immediate impact.
Unix line
"A lot of Exemplar's growth in the past 12 to 18 months has been in its Unix line," said Dave Kohlmeier, director of marketing for the design-software business unit at Data I/O Corp. (Redmond, Wash.). "We have been on the PC exclusively." Kohlmeier predicted that the acquisition will strengthen Exemplar's focus on Unix and produce a net gain for Data I/O.
The deal came as no surprise to Cadence Design Systems (San Jose), according to Jim Douglas, vice president of marketing: "Mentor had an existing relationship with Exemplar. This is typical of their mode of operation: you make the channel work, and then you go buy it."
Viewlogic Systems Inc. (Marlboro, Mass.) had been expecting the acquisition for some time, said chief operating officer Will Herman. "As Mentor continues to ro
ll out its new product and acquisition strategy, Exemplar seems like a natural addition to the mix," he said. "The primary question I have is whether the goal of this acquisition is the new systems-on-silicon strategy, or is it directly targeted at the FPGA market."
Smart EEs are all over the Net
By Larry Lange
Not long ago, a designer at VLSI Technology Inc. needed to do research at the U.S. Patent Office and to gather product and standards information from Hewlett-Packard, Pacific Bell and Sun Microsystems. The engineer, Gregg Lahti, managed it all in three hours without leaving his office in Tempe, Ariz. How? By surfing the Internet on his engineering workstation.
Engineers involved with government projects have been utilizing the Net this way for years, but with the recent explosion of on-line population, the sheer amount of resources now available is staggering. The Internet is bulgin
g with huge, searchable databases, software and utilities that can be downloaded for free, and news of the latest developments in engineering.
Alliance unwraps 256-Mbit DRAM
By
David Lammers
KYOTO, JAPAN --The three advocates of trench-capacitor structures for next-generation DRAMsıIBM Corp., Toshiba Corp. and Siemens AGıcame here last week to show the first tangible results of their two-year-old collaboration to develop a 256-Mbit DRAM and a 0.25-micron process. The companies presented a functional 256-Mbit DRAM at the VLSI Technology and Circuits symposium, promising engineering samples in two to three years.
The triumvirate also presented their 0.25-micron process and outlined the changes that would be required to take it to 0.18 micron. The partners were not the only companies thinking quarter-micron at Kyoto: AT&T Bell Labs researcher
s unveiled a 0.25-micron CMOS process developed with wireless-communications ICs in mind.
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