EET-i Top of the News

Week of Apr. 10, 1995

Apr. 13, 1995

NEC, Samsung launch 64-Mbit DRAMs

MIPS, NEC roll multimedia CPU

Hitachi, VLSI claim densest ASIC process

Chip vendors eye new PCMCIA spec

Cisco looks to LAN-switching future
What's new(s) at EE Times-interactive

Apr. 12, 1995

Crosspoint rising from the ashes

Russia seeking electronics partners

PCS, GPS vendors must turn to entrepreneurial models

Microsoft, Intel snub would-be CTI umbrella group

AT&T's Wireless Data Announces CDPD service

The P.E. license: Any more relevant?

Apr. 11, 1995

Key 3D viewing standard on tap

Real-time audio for I-net

Actel refines FPGA set

IAP preps high-intensity e-beam

Neural nets at NASA to fly hypersonic spy plane

CML design style beats CMOS

Packaging group requests 3-D standards

Apr. 10, 1995

U.S. HDTV standard set

Synclink over SDRAMs?

Spec for MCM production

`Open factory' hurdles

Other news sources on Techweb:

• Interactive Age
• Information Week
• Electronic Buyer's News

NEC, Samsung launch 64-Mbit DRAMs

By David Lammers

TOKYO -- The market's first 64-Mbit DRAM engineering samples, fabricated in 0.32-micron processes that push i-line lithography to its limit, are emerging from NEC Corp. and Samsung Electr onics Co. The samples now being evaluated are the forerunners of a DRAM generation expected to last four or five years, with volumes peaking early in the 21st century.

NEC and Samsung (Seoul, South Korea) each has shipped sets of five to 10 64-Mbit DRAM samples to half a dozen workstation, server and mainframe-computer makers. Both companies used their R&D lines to make the first samples.

By June or July, NEC Kyushu will be ready to produce larger quantities on its newest line. Samsung's third 8-inch fab line, Kihung Fab 7, will start turning out 64-Mbit samples this summer, when customers are expected to begin evaluating greater numbers of samples in prototype systems.

NEC used i-line steppers for most of the mask layers, turning to phase-shift masks only for creation of the contact holes, which require about 10 percent tighter process rules, said senior engineering manager Shigeru Koshimaru. Samsung used straight i-line throughout, preferring not to push the process with phase sh ift for the critical layers.

MIPS, NEC roll multimedia CPU

By Ron Wilson

MOUNTAIN VIEW, Calif. -- MIPS Technologies Inc. and its silicon partners continued their line extension in the R4000 CPU family this week with the announcement of a 120-Mips processor aimed at interactive multimedia applications. The R4300i is an evolution of the NEC R4200 64-bit CPU design, and is believed to be the processor designed for Nintendo's Ultra 64 videogame, though the companies would not confirm that.

The R4300i is targeted for moderate-bandwidth, moderate-cost applications that do not suffer serious power-supply constraints but have high integer-computing loads. As such, the chip fits roughly between NEC Corp.'s R4100 CPU--an R4200-derived part for battery-based applications--and the R4600 designed by Toshiba and Integrated Device Technology, which ha s been targeted for general embedded-computing applications.

The R4300i makes a series of architectural choices consistent with its intended function in game consoles, set-top boxes and the like. "The chip was designed at MIPS specifically for interactive consumer applications, but with its high performance and very low cost/performance, it will be attractive in the general embedded-computing market as well," said MIPS product marketing manager James MacHale.

To achieve high performance, at least on the inner loops of interactive graphical codes, the R4300i runs its single-integer execution pipe at 100 MHz. That speed is made possible in a relatively inexpensive chip_NEC estimates $35 each in quantity_by use of NEC's leading-edge 0.35-micron logic process. The same process is used on NEC's R4200 and R4100 CPUs.

Hitachi, VLSI claim densest ASIC process

By Ron Wilson

SAN JOSE, Calif. -- Hitachi America Ltd. and VLSI Technology Inc. moved to stake out their place in the 0.35-micron ASIC race this week, announcing not their products but their jointly developed process. By concentrating on interconnect technology rather than gate length, the two companies have developed the densest ASIC process ever announced, according to their claims.

"Because we are able to maintain a 1.4-micron metal pitch, we believe this process will be 30 percent denser than any other announced 0.35-micron ASIC process," said VLSI director of strategic marketing Ray Slusarczyk. VLSI said that 5-million-gate, cell-based designs could be as compact as 770 mils on a side. Hitachi marketing manager Jim Smith added that this density would benefit not just the largest system-level chips. "Really huge chips are feasible," he explained. "But chips in the 1-million-gate range are actually in the sweet spot for this process."

Herbert Reiter, director of product planning for VLSI, claimed that the fine metal pitch would also help performance. "In these very fine geometries, we have found that interconnect design is more significant in the final performance of the chip than the channel length. We are using a 0.4-micron-drawn channel, which gives us an L-eff of 0.35 micron. But we use the 1.4-micron metal pitch on the first three layers of an interconnect design that can accommodate up to five metal layers. That gives us improved density, and hence improved performance."

VLSI stated that the new process would be capable of system clock frequencies in excess of 250 MHz. "The performance extends to the I/O ring," Reiter claimed. "We will be able to handle 622-Mbit/s ATM directly on the chip, without requiring an external interface.

The new process is being jointly developed in Japan by Hitachi and VLSI.

Chip vendors eye new PCMCIA spec

By Ron Wilson

SAN JOSE, Calif. -- In the wake of the PC Card '95 specification and the first moves toward 32-bit Cardbus, silicon vendors are taking a hard look at the PCMCIA bus market and picking implementation strategies. Some, like Vadem Inc., are plunging ahead with implementations of the latest PC Card '95 specification. Others, like Acer Laboratories Inc., are staying with the older PCMCIA revision 2.0 spec but implementing socket controllers for the latest core-logic chips.

Significantly, no company, including traditional market leaders like Intel Corp. and Cirrus Logic Inc., has stepped up to the full implementation of a PC Card/Cardbus controller. And the variety of legal subsets threatens to stir confusion among end users, who may have a lot of difficulty figuring out which cards will work in which sockets.

The closest approach yet to full PC Card '95 will be announced next week by Vadem, whose VG-469 controller complies with all t he mandatory parts and some of the optional features of the latest spec. The chip controls up to two PC Card sockets, complies with PCMCIA 2.1 in full and includes some of the extensions approved in PC Card '95.

These extensions form a menu of required and optional items that extend the reach of PCMCIA 2.1, said Vadem technical marketing manager Phil Holden. Going beyond previous PCMCIA specs, PC Card '95 provides for multiple I/O functions on a single card, for low-voltage cards and for power management. Optional featues include a direct-memory-access (DMA) protocol and a 32-bit Cardbus interface.

Cisco looks to LAN-switching future

By Loring Wirbel

SAN JOSE, Calif. -- Cisco Systems Inc., the router vendor that has been moving into Asynchronous Transfer Mode (ATM) technologies, has launched a major push into frame-switching services. T o that end, Cisco has ambitious plans for the future of its Kalpana and Crescendo LAN-switching subsidiaries.

Crescendo, with a background in FDDI concentrators, brought to Cisco experience in switching LAN frames across different topologies at Layer 3 (transport) in the Open Systems Interconnect stack. Kalpana, for its part, is loaded with expertise in Layer 2 Ethernet-only bridging.

Most recently, Kalpana has been grappling with the challenge of upgrading a 16-port switching matrix while keeping its platform simple enough to sell through distribution and reseller channels. The fault-tolerant ProStack system was Kalpana's answer_a new system that allows multiple Ethernet switches to be stacked using a "top of the stack" switching-matrix system that links to 192 ports through a non-blocking crosspoint switch.

Kalpana systems now can be scaled up to high departmental applications, said Larry Blair, director of market development for the ProStack line. Also, they will provide full-duplex su pport for such links as Fast Ethernet, 100 VG-AnyLAN and 155-Mbit ATM pipes.

Crosspoint rising from the ashes

By Brian Fuller

SANTA CLARA, Calif. -- Crosspoint Solutions Inc., a startup FPGA vendor that many left for dead for two years, has fixed its buggy fine-grained architecture, brought in new management and set its eyes on the billion-dollar programmable-logic business.

The 26-person company let go its sales force in 1993 when early versions of its FPGA failed to work, in some cases, at customer sites. But, with patient capital from its parent company, ASCII of Japan, Crosspoint engineers set out to fix the problems and bring the promising architecture back to market.

"We're back," new chief executive officer Robert Blair, a former vice president at gate-array pioneer LSI Logic Corp., said in an interview with EE Times. "T he opportunity for Crosspoint to re-enter the market is good."

The company, which Blair wants to mold as a "one-tenth scale model of LSI Logic," is shipping an improved version of its 4,000-gate FPGA, will unveil an 8,000-gate versionýnow in final shakedownýmidyear, and then offer a 12,000-gate FPGA next year. The company will announce pricing and additional details at PLDCon in Santa Clara late this month, Blair said.

The challenges facing Blair are enormous, not the least of which is the extraordinary FPGA-business shakeout that has occurred in the past two years, knocking out both established and startup companies. The business is basically controlled by a few entrenched vendors vying for each other's business, and many feel the shakeout is far from over.

The other big challenge in front of Crosspoint is convincing the market that the Crosspoint antifuse architecture is healthy, and to do that, Blair, who started just weeks ago, is being brutally honest about the problems.

The architecture su ffered "a lack of complete characterization of the antifuse. Combining characterization and some circuit techniques resulted in unforeseen functionality," he said. "Customers were seeing parts do things they shouldn't be doing," including failing altogether.

Russia seeking electronics partners

By Peter Clarke

MOSCOW -- The Russian government has formed a special fund to help implement a national electronics program. One result could be the formation of joint-ventures at the country's major wafer fabs -- if partners can be found. Angstrem (Zelenograd, Russia) is one of the IC makers looking for investors.

Russia's financial difficulties have left the fund with only about $100 million, and part of that is based on tax exemptions and other benefits. To help gather more money ,the fund is also expected to act as a focus for inward investmen t and as a catalyst for the privatization and sell-off of what were previously state-run operations.

The Federal Fund for Electronics Development (FFED), headquartered in Moscow, is setting up branch offices in the largest centers of Russian electronics manufacture, such as St Petersburg, Saratov, Voronezh and Novosibirsk. To meet its goal of attracting inward investment, the FFED will also open offices in Europe, the United States and Southeast Asia.

East/West Electronics is organizing a conference in Moscow May 14-17 at which FFED chairman Anatoly Andreev will speak. The conference will include visits to Angstrem and Electronica, two Russian companies looking for partners in their wafer-fab operations.

PCS, GPS vendors must turn to entrepreneurial models

By Loring Wirbel

COLORADO SPRINGS, Colo. -- The end-user markets for satellite -based Personal Communication Services (PCS) and Global Positioning Systems (GPS) will extend into the billions of dollars by the end of the decade, space-commercialization experts predicted here at the 11th National Space Symposium. But panelists warned that large companies hoping to tap those markets must adopt the high-risk strategies of startups to avoid being outmaneuvered by competition.

The panelists pointed to Motorola's Iridium PCS and General Motors/Hughes's DirecTv direct-broadcast satellite (DBS) systems as proof that large companies can still create investment structures similar to those of entrepreneurs.

The days when NASA and the Defense Department served as space-industry seed financiers and prototype providers are over, panelists agreed. With NASA's budget slated for further cuts, companies must take advantage of existing infrastructure to build their space-communications businesses.

So many companies are exploiting the capabilities of GPS Navstar navigational satellites, said fo rmer NASA deputy administrator Hans Mark, that "we should be taxed for the privilege of using GPS and put the revenues into new remote-sensing opportunities for private industry."

Microsoft, Intel snub would-be CTI umbrella group

By Michele Clarke

DALLAS -- When the newly created Multimedia Telecommunications Association holds its first meeting here next Wednesday, neither Microsoft Corp. nor Intel Corp. will be on hand, a rebuff to an organization that had hoped to pull together currently splintered efforts at computer-telephony integration (CTI).

Both Microsoft and Intel outlined well-developed CTI plans and preliminary third-party support during last month's Windows Hardware Engineering Conference.

"Microsoft declined to participate and then Intel declined because of that," said conference promoter Susan Mills, a principal at Tec hnology Marketing Partners. "We recruited them heavily. We still want them to be part of this association. We'll put them on the board if we have to."

But Microsoft isn't bending. "I wouldn't read anything Machiavellian into this," said Tony Bawcutt, Microsoft's group program manager for telecommunications, who declined the conference invitation. "Because of things like WinHEC, CeBIT the CT Expo, it was just one more event and we were already spread pretty thin. And if this turns out like other things the North American Telecommunications Association has done ... it will be a non-event. We've been disappointed with their ability to be a player in CTI." CTI grew out of NATA.

Intel software architect Herman D'Hooge, who declined the group's invitation for his company, agreed. "We've had bad experiences with the NATA. They weren't the most productive group."

AT&T's Wireless Data Announces CD PD service

By Loring Wirbel

KIRKLAND, Wash. -- After a delay of several months, AT&T's Wireless Data Division is finally ready to offer Cellular Digital Packet Data service in several metropolitan areas. The division, formerly part of McCaw Cellular, is hoping to promote use of CDPD over circuit-switched cellular data transmission by pricing packet service to make continuous-connect packet data links economical.

CDPD has been promoted by AT&T/McCaw, IBM Corp. and several regional cellular carriers as a way to packetize data for efficient transmission over analog cellular bands, using the "dead time" between voice use of channels. Members of the CDPD Forum have promoted the service as offering better coverage than dedicated packet bands from Ardis Inc. and RAM Mobile Data Inc., while offering lower prices and greater reliability than circuit-switched cellular modem technologies.

Full metropolitan service is being offered this month in Miami by AT&T under the name AirData Business Service. By the end of June, AT&T will have service up and running in Dallas, Las Vegas, Fort Lauderdale, Seattle, Portland (Ore.), Minneapolis, Oklahoma City, Tulsa and Salt Lake City.

The P.E. license: Any more relevant?

By Robert Bellinger

WASHINGTON -- John Doe, P.E. Does the P.E. -- or Professional Engineer -- title make John a better engineer, or a more professional one? Although it may sound like a matter of semantics, the debate over licensing that's been circulating through the engineering community for years is taking on new urgency now that more engineers are going independent.

For many EEs, the P.E. license has long been irrelevant. Protected by the "industrial exemption" clause of most state laws, most electronic engineers have practiced their profession under the um brella of a large employer without fear of anyone knocking on the door and accusing them of practicing without a license. Consequently, only 20 to 30 percent of IEEE members, for instance, have a P.E. license.

But advocates of licensing and registration detect a shift in the wind. More engineers are setting up shop as consultants, and discovering that they no longer can hide behind the industrial exemption.

Some states have stiffened regulations on engineering licensing. California has beefed up penalties and redefined software engineering to fall under regulation. Other states, such as Delaware, have hauled companies and individuals into court who had the title "Engineer" or "Engineering" attached to their names.

Even employers are squirming in their seats. As society has become increasingly litigious, employers are getting nervous about being pinned to the wall in court for having -- in the strictest legal sense of the word -- "non-engineers" designing their products.

Key 3D viewing standard on tap

By Michele Clarke

MOUNTAIN VIEW, Calif. -- A key standard needed to enable three-dimensional network gaming and viewing across a network is winding its way through the World Wide Web Organization (W3O) --a consortium run out of the Massachusetts Institute of Technology that manages the Web community. A draft of the standard should be ready later this month for submission to the W3O and could be proposed to the Internet Engineering Task Force as early as this fall, said those sheperding the effort.

Called the Virtual Reality Markup Language, or VRML, the scheme would initially enable the creation of virtual worlds with limited interactive behavior and hyperlinks to other VRML worlds, Hypertext Markup Language (HTML) documents and other multimedia Internet mail extension (Mime) types. Viewing software supporting the language wo uld allow users access to databases of 3-D objects.

Ultimately, VRML can be used to describe all aspects of multi-participant interactive simulations using virtual worlds networked via the Internet and hyperlinked with the World Wide Web, including display, interaction and internetworking, claimed Mark Pesce, a general partner in The Community Co. and a chief proponent of VRML.

Specifically, VRML defines a set of objects, called nodes, deemed useful for creating 3-D graphics. Objects can contain things such as 3-D geometry, MIDI data and JPEG images, and are arranged in hierarchical structures that define node ordering called scene graphs. To ensure that a rotation or material node will affect other nodes after it appears in a scene, the scene graph has a notion of state. Separator nodes allow parts of a scene graph to be functionally isolated.

According to VRML documentation, objects can also contain hyperlinks to any other type of Web entity, such as an HTML page. When a user selects a n object with a hyperlink, the appropriate Mime viewer is launched. Likewise, when a user selects a link to a VRML document from within a correctly configured Web browser, a VRML viewer is launched.

VRML is based on technology gained from Silicon Graphics Inc.'s (SGI) Open Inventor 3-D application-development tool kit (which is based on the OpenGL API). Born at the first World Wide Web conference in Geneva last year, VRML is actually an ASCII subset of Silicon Graphics Inc.'s (SGI) Open Inventor File Format (IFF) with extensions to support networking, said Pesce. IFF supports descriptions of 3-D scenes with polygonally rendered objects, lighting materials, ambient properties and realism effects, according to SGI officials. In addition to making the file format publicly available, SGI has also placed a file-format parser into the public domain to aid VRML viewer development.

SGI last week announced the first VRML-based viewing package, called WebSpace, which the company codeveloped with Template Graphics Software (TGS) Inc. The $49 software will be available from TGS for all major non-SGI Unix platforms, Microsoft Windows/Windows NT and Power Macintosh systems, according to the companies.

A draft of the VRML standard should be ready later this month for submission to the W3O, said Pesce. Upon approval, the specification will be submitted to the IETF and the International Standards Organization for formal adoption as an Internet standard, he said. The W3O is .

Beta versions of the WebSpace viewer will be available at the end of the month. Non-supported versions are free from several public ftp sites including SGI's web site .

Real-time audio for I-net

By Junko Yoshida

LAS VEGAS -- Audio will stream over the Internet from the National Association of Broadcasters conference here th is week as multimedia upstart Progressive Networks (Seattle) launches its bid to deliver on-demand news and entertainment to PCs. In effect, the service makes everyone a broadcaster the way the World Wide Web makes everyone a publisher.

Among the backers of Progressive Networks is Mitchell Kapor, a founder of Lotus Development Corp. The scheme has been embraced by broadcast news and entertainment providers such as Cap Cities/ABC and National Public Radio. It uses technology--RealAudio--built around a proprietary audio-compression scheme and a new high-reliability communications protocol. Transmission is in real-time, with no need to download and play back huge audio data files.

In a demonstration, an ABC Radio news clip posted at 1 p.m. Pacific time was played back moments later in New York. The playback showed that, short of slowdowns on the net, clients with a PC--which can connect via ordinary phone lines--can listen to an audio file almost immediately, without waiting for it to download.

Currently, audio and video ride the Internet via MBONE, the multimedia backbone. MBONE has been used largely as a quasi-public service to deliver technical broadcasts and other programming of interest to the Internet community. RealAudio, in contrast, is being positioned as a commercial offering.

Actel refines FPGA set

By Richard Goering

SUNNYVALE, Calif. -- Marking what Actel Corp. calls its most significant software introduction to date, the Designer Series 3.0 tool set adds a timing-driven FPGA layout feature that promises -deterministic designs. Scheduled for display at the upcoming PLDCon '95 in Santa Clara, Calif., the revision also adds a new graphical user interface, a flow manager and an object-oriented database.

Tom Todd, Actel director of product marketing, said Designer Series 3.0 represents a complete redesign of earlie r Actel software. It's built from scratch as a 32-bit Windows application, using a commercial object-oriented database from Object Design (Burlington, Mass). In addition to placement and routing for Actel FPGAs, Designer Series includes the ActMap VHDL synthesis program and ActGen module generator.

"One of the most significant features of the release is the DirectTime option, which provides a constraints editor, timing-driven placement and routing and static-timing analysis. This option makes FPGAs -deterministic," Todd said, because users can control device performance by specifying constraints.

DirectTime will always adhere to user-defined constraints, Todd added, presuming that the constraints can be met by the silicon. "If you ask for 25 MHz for a part that's rated in the data sheet at 25 MHz for the type of logic you're doing, you+re going to get 25 MHz," he said.

IAP preps high-intensity e- beam

By Chappell Brown

TORRANCE, Calif. -- Adding to the growing list of applications for ferroelectric ceramics, Integrated Applied Physics Inc. is developing a high-intensity electron-beam source using a cathode made of lead lanthanate-zirconate.

Building on work at Europe's nuclear research organization and Cornell University (Ithaca, N.Y.) that unearthed a new "cold-emission" effect in ferroelectrics, the company has developed a compact rugged e-beam source 10 times as efficient as conventional thermionic sources.

"Our latest measurements show that the beam quality is also superior, which is encouraging for potential applications," said George Kirkman, president of IAP. "We are targeting specialized areas such as high-intensity microwave and X-ray tubes, and high-power switches. Another important area is plasma generation for industrial pollution control."

Neural nets at NASA to fly hypersonic spy plane

By R. Colin Johnson

ATLANTA -- Accurate Automation Corp. featured its neural-network-based control technology for hypersonic aircraft at the recent White House Economic Summit here.

At the event, Philip Lader, administrator of the U.S. Small Business Administration (SBA), formally announced an award to the Chattanooga, Tenn.-based company of Phase II of a NASA-sponsored Small Business Innovative Research (SBIR) contract to build a neural-controlled hypersonic aircraft.

The Economic Summit preceded the International Aerospace Planes and Hypersonics Technologies Conference held in Chattanooga last week, where Accurate Automation is demonstrating the results of Phase I-where wind-tunnel tests validated the design of an 8-foot long model of the neural-controlled hypersonic aircraft. The jet-powered 24-foot-long full-sized aircraft to be built in Phase II is slated for test ing in 1997.

The first demonstration of the full-sized aircraft will be subsonic, and has been appropriately named LoFlyte for Low-Observable Flight Test Experiment. The key to LoFlyte's success is the neural-based controller, which learns how to handle hypersonic aircraft from experience. The neurons learn the control of hypersonic aircraft by observing its flight-sensor inputs while noting the responses, or outputs, of an expert pilot. Even after learning the input/output response patterns for human pilots, the neural network can continue to adapt by using performance measurements to continually optimize performance, such as adjusting speed for the best fuel economy.

CML design style beats CMOS

By Chappell Brown

SENDAI, Japan -- As VLSI designers contemplate the move from 5-V to 3-V levels required by smaller design rules, they might find c urrent-mode logic (CML) an attractive alternative. By representing logic levels with amps instead of volts, CML circuits run faster at lower voltages, require fewer transistors, and take up less chip area, all of which comes with the same power dissipation as CMOS.

One key simplifying factor in CML design is the ability to represent more than two logic levels. The concept of using current-mode CMOS technology with multiple logic levels was first proposed in 1983 by Wayne Current, a VLSI expert at the University of California, Davis. The most dramatic demonstration of the potential of this approach was a prototype CMOS CML 32- x 32-bit multiplier built in a collaboration between VLSI designers at Tohoku University here and Matsushita Electric Industrial Co. (Osaka, Japan).

The chip, using conservative 2-D design rules, was half the size of standard multipliers and ran as fast as the fastest binary multipliers.

In the design of the adder circuit devised by the Tohoku University group, five logic levels are employed to reduce the number of transistors by a factor of four. The adder is realized with a design style called Dual Rail Source-Coupled (DRSC) logic that can be implemented with PMOS transistors. The new approach actually doubles the number of transistors that would normally be required in standard CML design.

Packaging group requests 3-D standards

By Ashok Bindra

DENVER -- Because of the scope of applications for high-density 3-D memory packages, the 3D Packaging Standards Working Group (3D PSWG) is seeking standardization proposals from member companies. These proposals will be evaluated at next week's International Conference on Multichip Modules here.

An ad hoc working group formed last year, 3D PSWG is seeking 3-D memory standards that will be independent of technology. The PSWG group is steering toward a flexible stan dard that will permit each vendor to meet the 3-D requirements with its own technology, said Bruce Kaufman, president of solid-state mass-memory producer Controlex Corp. (Van Nuys, Calif.). Toward that goal, PSWG has generated some parameters on which the 3-D memory standard must be based. These include footprint, height, connection characteristics, operational characteristics, memory size, density, testability, repairability, die size, known-good die, thermal management, high-speed signal integrity, software tools, reliability and radiation. The group is asking proposers to provide cost and time as well as the advantages and disadvantages of the proposed implementations.

At next week's MCM conference, the group plans to evaluate different proposals submitted, and hopes to take a final vote in June.

U.S. HDTV standard set

By George Leopold

ALEXANDRIA, Va. -- Perhaps more significant at the National Association of Broadcasters conclave than the new Internet audio scheme will be the public's first look at the U.S. digital HDTV system. The April 10 unveiling comes one week after a prototype system arrived at a test facility here to begin the final round of laboratory evaluation.

The HDTV demonstration is just one of a raft of digital TV technologies to be on display at this week's show in Las Vegas as broadcasters and consumer electronics manufacturers gear up to build multimedia interactive TV networks.

If all goes as planned, the demonstration of digital images by the HDTV Grand Alliance will be followed by formal testing beginning April 24 and continuing through July. A report on test results is due to a Federal Communications Commission (FCC) advisory panel by Aug. 30. The Advisory Committee on Advanced TV Service is scheduled to recommend an HDTV standard to the FCC in October.

The FCC will use the recommendation in setting a digital TV broadcast standard that broadcasters expect will be adopted early next year. FCC officials said last week that adoption of the standard could come sooner, perhaps by the end of the year.

Synclink over SDRAMs?

By Ron Wilson

SANTA CLARA, Calif. -- A new interface between memory controllers and main memory might give emerging synchronous DRAMs (SDRAMs) a run for their money. A version of Synclink, as the new concept is called, is to be shown April 10 to a memory-industry working group at a Hyundai-sponsored meeting.

The proposal--one of dozens swirling about in the design community--contains ideas both from the IEEE Scalable Coherent Interface (SCI) and the Jedec SDRAM effort. One result could be to push usable memory bandwidth to 500 Mbytes/second--beyond the range of existing technology. But first the plan must emerge fr om the treacherous sea of IEEE protocol standards, Jedec signaling standards and DRAM industry strategies.

Synclink rests on two concepts: the IEEE standard Ramlink protocol and a wealth of new signaling possibilities. In the April 10 proposal by Hans Wiggers, senior memory systems engineer at Hewlett-Packard Co., Synclink would connect an intelligent memory controller to a number of DRAM-based memory modules. Packet-oriented transactions between the controller and the modules would take place over semi-synchronous, unidirectional buses. Commands would move on one bus and responses on a second, at speeds as high as 500 Mbytes/s.

Spec for MCM production

B y Terry Costlow

DENVER -- Multichip modules could have a smoother ride into production once a new spec for using bare dice is unveiled at the MCM Conference here next week.

The Die Information Exchange Format--forge d by a consortium working under the auspices of the Advanced Research Projects Agency (Arpa)--is expected to make unpackaged dice far easier to design in, purchase and use. Several chip makers, CAD-tool suppliers and MCM module vendors will likely endorse it at the meeting.

The standard, seen as crucial to widespread acceptance of MCMs and direct chip attachment, provides a way for MCM makers and others who use bare dice to get data that can't be found in traditional spec sheets, such as driving and switching capabilities for I/O pads and many details that will help manufacturing personnel trim production times.

A host of chip makers helped develop the spec and are expected to support it. Already Intel, Micron Semiconductor, Motorola, National Semiconductor, Texas Instruments and Xilinx have converted data to the format.

`Open factory' hurdles

By Terry Costlow and Michele Clarke

ROMULUS, Mich. -- When General Motors' engine plant comes on-line here this year, all the processes will be controlled by personal computers in a factory that represents something of a high-water mark for the supercautious process and discrete-manufacturing sectors.

PC-based industrial-control software has been around since 1984. But the industry has been slow to trust PC reliability. Also, many industrial-automation vendors, and a fair number of users, don't want to shift from familiar proprietary architectures. And even those that do agree that there are many areas where compatibility problems may arise.

On the hardware side alone, manufacturing engineers are puzzling over the many different field buses vying for acceptance. Programmable logic controllers are equally confusing. On the software end, many manufacturers are settling on Windows as the operating system of choice, but real-time operating systems offer additional possibilities.

It thus appears that diversity will be the nor m in many manufacturing enterprises, raising support issues, among other potential problems. Several translations will be necessary when signals are created on one bus, move to another, then are received by a controller on yet another bus architecture. That's expected to create a whole new market for "middleware"--the software that links various applications packages, networking schemes, messaging schemes and so on.

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