EET-i Top of the News
Week of Jan. 30, 1995

- Thursday, Feb. 2, 1995
Inmarsat raises $1.4-billion for satphone subsidiary
Sun's maneuvers boost MCM industry
Silicon support emerges for 100VG
Sun to launch `early notification' service
What's new(s) at EE Times-interactive
- Wednesday, Feb. 1, 1995
Systems & Networks to apply EDA model to communications
Interviewing: Everything you know is wrong
More turbulence in interactive digital media
Matrox breaks integration barrier with 3-D chip
ARM shows up in wireless, encryption applications
- Tuesday, Jan. 31, 1995
Speech recognition enters the mainstream
Actel offers VHDL tool
Adaptec rolls cards, software into server design kit
Battle for Pentium cache continues
EE Times, Aavid sponsor on-line thermal-management panel
- Monday, Jan. 30, 1995
Race is on to 0.35-micron ASICs
Hollywood takes position as arbiter of CD standards
ComNet builds up NII
TI breaks $10 for 32-bit floating-point DSP
Triton chip set aims fo
r signal-processing speed
Special Report: Emerging Markets, 1995

Inmarsat raises $1.4-billion for satphone subsidiary
By Peter Clarke
LONDON -- Inmarsat has received $1.4 bilion in investment commitments to finance a subsidiary company that will launch the Inmarsat-P handheld satellite phone system. Due to start in 1999 and be fully operational in 2000, the Inmarsat-P system could compete with other satellite phone systems being proposed by such companies as Motorola (Iridium), Teledesic and Loral (Globalstar).
Thirty-eight investors from Inmarsat's affiliate companies are supporting the venture. Inmarsat will invest $150-million. A board of directors, which has been appointed, will choose a name for the new company and appoint its office
rs.
Olof Lundberg, Inmarsat's director general, said, "Inmarsat has stolen a march on the global handheld satellite phone race. The number and prominence of the investors demonstrates the overwhelming support and confidence of the telecommunications world in the Inmarsat-P program and will now allow the implementation of Inmarsat-P to go forward with speed and urgency."
The International Maritime Satellite Organization started as a global grouping of nationally owned public-telephone operators organizing ship-to-shore satellite communications. It is now a 76-nation organization offering mobile communications based on geostationary satellites to ships, aircraft and users on land.
Sun's maneuvers boost MCM industry
By Terry Costlow
SANTA CRUZ, Calif.
--
Sun Microsystems Inc. (Mountain View, Calif.) is using a memory module that doubles capaci
ty, it has told the IEEE's Multichip Module Conference here, and MicroModule Systems Inc. (Cupertino, Calif.) has announced it is shipping a module made by Ross Technology Inc. (Austin, Texas) that is also being used by Sun.
That latter module is also being made by Nchip Inc. (San Jose, Calif.). Nchip helped design the MCM, which includes a Sparc processor, cache controller and SRAM chips.
The other module Sun is using houses four SRAM chips in a plastic quad flat pack that measures only 28 by 28 mm. It enabled the company to double the amount of cache in a workstation without taking any more space.
"The MCM provides a very nice way to fit in memory without changing the footprint of the system," said Howard Davidson, quantum mechanic at Sun Microsystems Sparc Technology Business (Mountain View).
The moves by Sun are a significant boost to the MCM industry, which still has few high-volume users. They also underscore a major change in the young industry, suggesting that engineers a
re going with less-aggressive designs.
Silicon support emerges for 100VG
By Brian Fuller
And Loring Wirbel
SAN FRANCISCO -- Motorola Inc. is joining a dozen other companies in jumping on the bandwagon for the 100VG-AnyLAN networking protocol, as backers of the standard hustle to gain mind-share over the competing 100 Base T protocol. Multiple hubs and switches, as well as multiple silicon sources, will now be available for VG. But market analysts wonder if the new IEEE networking standard can gain significant ground against the combination of Fast Ethernet, switched Ethernet, 25-Mbit ATM and the old, familiar FDDI.
Thirteen companies gathered here Monday at the 1995 100VG-AnyLAN Forum to announce systems and silicon targeting the Hewlett-Packard-based protocol, which aims to boost the speed and performance of Ethernet and token-ring networking frames to 100 Mbits/second.
"We're serious about VG (voice grade) becoming a mainstream networking solution," Gary McAnally, general manager of Hewlett-Packard Co.'s Networks Division (Roseville, Calif.), told a panel session. "We're serious about 100VG becoming the evolution of 10 Base T. We want to accelerate acceptance."
The draft specification of the IEEE 802.12 standard, first proposed in November 1992, was sent last month to the IEEE 802 sponsor ballot. Mike Shoemake, program manager for VG products at Motorola, said that his company agreed to become a second silicon source (after AT&T Microelectronics' Regatta set) because "VG is very far along in the standards process."
Sun to launch `early notification' service
By Michele Clarke
MOUNTAIN VIEW, Calif. -- In the first of what's expected to be a flood of announcements of improvements to customer-notification systems industrywide, Sun Microsyst
ems Inc. next Tuesday will launch an "early notifier" service that will e-mail customers if problems are found with the company's products. The messages will also point to where customers can obtain more information or outright technical patches, said the company.
"This information will apply to all of our hardware and software products, from the system to the component level -- including the Sparc microprocessors," said Jamie Enns, manager of technical-systems marketing at Sun Microsystems Computer Co.
On-line updates of the SunSolve Early Notifier information will be made every two weeks. A CD-ROM version will continue to be available and to be updated every six weeks, said Enns.
Paired with the notification service are a SunSolve Bulletin Board Internet forum and a SunSolve On-line WorldWide Web page that will house nightly updates of technical documentation and patches, said Enns.
The company will also supplement its 800-number customer-service line with an Internet e-mail link
, called Sun NetRequest Service.
"Problems can often be better communicated on-line than verbally," said Enns. "This way, a customer can pass in an error message and we can see exactly what the problem is."
What's new(s) at EE Times-interactive
For a quick list and links to our most recently posted features, click
here.

Systems & Networks to apply EDA model to communications
By Loring Wirbel
FOSTER CITY, Calif. -- Systems & Networks Inc. (S&N), the new system-level communications-simulation company, wants to apply lessons in the evolution of the EDA industry to emerging problems of communications-systems design. In particular, the company, born of Cadence Systems
Inc.'s Alta Group subsidiary, wants to prove to LAN/WAN equipment vendors the importance of providing accurate software models of their products to external software companies.
Venk Shukla, S&N's vice president of marketing, believes that some of the lessons can be applied to the expansion of S&N's flagship product, called Bones (Block-oriented network simulator). S&N is respinning the notion of Bones system simulation as CAN-D (pronounced "candy") or computer-aided network design. "When you look at the industry's attitude toward high-level models, you can see some real parallels between CAN-D and EDA," Shukla said.
In the early 1980s, simple Tegas logic-simulation tools from GE-Calma required models to be provided by the end user of the EDA tools. With the rise of the Daisy-Mentor-Valid troika in the mid-1980s, vendors offered libraries of logic elements that could be simulated initially at the gate level, and later as RTL (register-transfer-level) models.
When true high-level be
havioral languages arrived with Gateway Design Automation Inc.'s Verilog in the late 1980s, Shukla said, the semiconductor makers then were responsible for providing accurate models in Verilog and VHDL of their most popular products. That sparked the intellectual-property debate over model ownership that still roils the EDA industry.
"I would contend that in the CAN-D industry, Bones was the Tegas equivalent," Shukla said. When the Bones group, then part of Comdisco Systems Inc., came up with its PlanNet tools in 1992, it marked the first time in communications design that models of devices such as routers and hubs were offered. Right now, S&N has to push the equipment vendors to ensure that the S&N design tools provide accurate representations of LAN and WAN equipment. Eventually, Shukla said, the equipment vendors will come to the design-tool vendors to have models included in design suites.
More turbulence in interactive digital media
By Michele Clarke
NEW YORK -- Despite healthy revenue growth recently, public companies in the interactive digital media world watched profits slide steeply. The result is that many of the companies remain risky investments, a new analysis indicates.
The analysis, from investment bankers Veronis Suhler & Associates, said that while revenue grew 18.7 percent, to $3.8 billi
on, in 1993 and continued strength is seen through 1998, profits at publicly traded interactive digital media companies fell 22.5 percent for the period.
Earnings for the group have fluctuated wildly since 1990, more than doubling in 1991 and 1993 but dropping precipitously in 1990 and 1992, said the investment firm.
Behind each decline, it said, were rising production and development costs for videogames as well as steeper competition. Those factors drove marketing and subscription-acquisition costs. "This is a typical pattern in a developing industry," said Robert Broadwater, Veronis's managing director for interactive digital media.
Included in the interactive digital media market are consumer data and transactions, consumer reference products, educational software and videogames (which compose 90 percent of the segment's reported revenue).
Matrox breaks integration barrier with
3-D chip
By Ron Wilson
DORVAL, Quebec -- Even with low-priced systems for the home-computing market, multimedia personal-computer vendors are expected to deliver an excellent graphical user interface, video and 3-D performance, a knotty problem being addressed by Matrox Electronic Systems Ltd. The Matrox solution is a moderately priced graphics controller that integrates a high-end GUI accelerator, a very competent 3-D rendering engine with some texture-mapping capabilities, and video-acceleration hardware. Compromises are still necessary to achieve such integration, but Matrox appears to have chosen many of the right ones.
The chip and the boards Matrox is building will break into a market that still relies on separate GUI, 3-D-rendering and video chips. In some implementations, such as those from Cirrus Logic and 3DLabs, the chips can share a frame buffer, often using a separate memory for Z-buffering. In the case of the Yamaha 3-D chip, the only other chip to offer texture-mapping s
upport, the 3-D engine requires its own dedicated video RAM frame buffer, and video from the 3-D buffer must be mixed, via analog switches, with video from the main frame buffer.
Such redundancy permits the use of less-expensive frame buffers and more-conservative CMOS processes. But it leaves the board designer with a large number of moderately expensive chips to serve what is supposed to be a consumer-priced market.
Matrox drew several existing cores into its latest 0.5-micron process, said technical marketing manager Kim Pallister. The MGA-2064W chip includes an upgraded version of Matrox's current 64-bit GUI accelerator, but with upgrades. Those include acceleration for BitBLT operations, even in packed-pixel modes, and a substantially improved VGA core with 32-bit data paths.
ARM shows up in wireless, encryption applications
By Loring Wirbel
ANAHEIM, Calif. -- VLSI T
echnology Inc.'s embedded ARM RISC core took center stage last week at a pair of communications forums. At the Cellular Telephony Industry Association's Wireless 95 show, here, the company introduced a "Ruby II" PCMCIA controller using ARM, as well as a two-chip set for Global Systems for Mobile Telecommunications (GSM) cellular radio.
In New York, at an AT&T Bell Labs security conference, VLSI introduced a single-chip encryption engine for Bell Labs' Information Vending Encryption System (Ives), which was also based on ARM. The chip marks the start of a collaborative effort between VLSI and AT&T Bell.
ARM accounted for two of three new architectures VLSI displayed at the cellular-telephony show. The ASIC company also introduced two options of protocol processors for the Digital European Cordless Telephone (DECT) standard. Since DECT involves simpler transcoding algorithms, it doesn't require a 32-bit RISC controller.
VLSI decided to make North American introductions of DECT and GS
M baseband processors, because the company believes the standards will be important in the United States for the 1.8-GHz PCS frequency bands. VLSI will work with RF specialists to provide analog front ends. For GSM, VLSI is working with Wavecom Inc. to provide a radio front-end design and protocol software.

Speech recognition enters the mainstream
By R. Colin Johnson
PORTLAND, Ore. _ Speech recognition is quickly being added to everything from computers to microwave ovens, auguring a day when the technology is as ubiquitous as the mechanical button. At first a novelty restricted to vertical applications where users had to keep hands or eyes free, speech recognition is now mainstream on high-end PCs and many over-the-phone services.
"Imagine a keyboard controller chip with integrated speech-to-text so that you can speak commands wh
ile your keyboard issues the corresponding keystrokes. Then imagine that this chip is actually cheaper for an engineer to use than a conventional controller chip, because we have integrated so many functions that it saves you from having to buy other support chips. That is our picture of the future," said Shawn Bale, technical marketing manager at AT&T Microelectronics (Berkeley Heights, N.J.).
"The kind of chips we are working on will also have speech synthesizers on them, too, so that you can talk back to say it's hearing you right."
AT&T recently announced a cellular phone-answering chip that also includes speech recognition, and more such chips are on the way this year. Bob Christiansen, vice president at Prometheus (Portland, Ore.), said that Sierra Semiconductor Corp. (Prometheus's parent) will add new chips to its Aria line that will merge more sound and communications functions with its current speech-recognition capabilities.
"We've already combined 16-bit sound, MIDI [M
usical Instrument Digital Interface] and speech on the same board, but with chip support from Sierra Semiconductor we'll be able to add even more value with our next generation of boards."
"Anything that already needs something like a DSP, such as an echo- cancelling digital speakerphone, can be quickly updated to recognize speech too," said vice president Jeff Hill at Voice Processing Corp. (Cambridge, Mass.). "The next crop of audio boards will add modems with speech recognition so that all the necessary telephone functions will be available to any PC."
In the last two years, speech-recognition rates have drastically improved, while DSPs and microprocessors have speeded up. "Together, those two factors have jointly enabled speech applications that promise to wow even the most farsighted designers," Hill said.
Actel offers VHDL tool
By Richard Goering
SUNNYVALE, Calif. --
In an attempt to broaden the usage of VHDL for FPGA design, Actel Corp. has added VHDL synthesis to its Designer Series development tools. Meanwhile, Esperan (Ramsbury, U.K.) has produced an Actel-specific version of its Master Class multimedia VHDL tutorial, coinciding with version 2.0 of that product.
The Windows-based ActMap VHDL synthesis module has been added to the Designer Series free. It was developed by Actel using core technology from Innovative Synthesis Technologies (IST; Grenoble, France). Actel's existing ActMap optimization tool, which lacks a VHDL synthesis capability, also uses technology from IST.
"We're offering this as a no-cost item because we want to deliver VHDL to a much broader base of accounts," said Tom Todd, director of product marketing at Actel. He noted that ActMap VHDL is targeted at first-time VHDL users and is designed for ease-of-use and learning.
Meanwhile, synthesis providers such as Synopsys and Exemplar provide VHDL and Verilog synthesis for Actel FP
GAs. Todd said that ActMap VHDL is not intended to compete against those offerings, which provide much broader language subsets and support a variety of device makers.
Adaptec rolls cards, software into server design kit
By Michele Clarke
MILPITAS, Calif. -- Hoping that designers of PC-based servers will opt for pre-engineered I/O subsystems, Adaptec Inc. has announced a "server design kit" that includes add-in hardware and system-management software. To cut costs for entry-level and midrange designs, the company replaced the microcontroller found on most SCSI controllers with an ASIC that accelerates key functions of RAID with algorithms running on the host processor.
"Server design requires a significant level of software delivery," said Clay Marr, marketing director for Adaptec's enterprise computing effort. "With this kit, we've assumed much of that burden."
Called IOware
, the kit includes a suite of I/O-management software, the AHA-3985 PCI-based RAID-5 adapter and the AHA-3940 PCI-to-multichannel SCSI-2 adapter. The company decided to offer a RAID adapter for low-end servers, because "we see the $15,000 to $20,000 server as the basic building block for enterprise computing, [and] many entry-level servers are now business-critical," Marr said.
The Network I/O server-management software bundled with the kit includes a 100-node version of Hewlett-Packard Co.'s OpenView network-management software and proprietary device-level diagnostics that gain performance data from devices attached to a given server. The software uses a Windows-like interface on its client program that maps the SCSI subsystems of all servers in the network, instead of just mapping to the server, said Marr.
Battle for Pentium cache continues
By Ron Wilson
IRVINE, Calif. -- The batt
le to cash in on Pentium's thirst for fast secondary cache continued in recent weeks, with two more vendors offering chips tuned for this narrow, but very deep, niche. At first glance, it appeared that there would be little more than price competition in the niche, as Intel has clearly spelled out the features and speeds needed for a no-wait-state, burst-synchronous secondary cache on P54C-based computers. Now, however, silicon expertise is beginning to tell, as vendors find ways to add value to the Intel spec.
Integrated Device Technology Inc. has announced a Pentium-specific 32k by 18 CacheRAM designed to operate with 90-MHz and 100-MHz P54C systems. Toshiba America Electronic Components Inc. has trumped that with a 32k by 32 and 64k by 16 parts.
Superficially, the chips meet the same specs, but IDT claims the highest performance solution with its 9-ns device. The chip meets Intel timing requirements, according to the company, for synchronous-burst and pipelined modes. Like the P54C, it is a 3
.3-V-only device, and like the CPU it is built in a 0.6-micron BiCMOS process. The part is available in volume now, in a 52-pin plastic leadless chip carrier, and is priced at $30 each in 10,000-lot quantities.
The Toshiba parts have twice the capacity of the IDT parts, reducing system chip count. The highest speed grade is marginally faster, with an 8-ns access time. Toshiba apparently believes that gives designers more headroom in achieving the 66-MHz bus frequency.
EE Times, Aavid sponsor on-line thermal-management panel
MANHASSET, N.Y. --
EE Times
and Aavid Thermal Technologies Inc. will hold an on-line conference on CompuServe on Monday, February 6, from 5 p.m. to 6 p.m. (eastern time) on thermal engineering and thermal management.
With processor speeds of 100 MHz becoming more common, it is becoming increasingly difficult to remove the dissipated heat that can cripple tod
ay's personal computers, communications equipment and other advanced electronic systems.
EE Times
and Aavid have convened a panel whose members include Seri Lee, Aavid's director of advanced thermal engineering; Dan McCutchan, technical marketing engineer with Intel's Pentium Processor Division; and Gary Kuzmin, Aavid's director of corporate technical marketing. Brian Santo,
EE Times'
Technology Editor, will moderate. The panel will briefly outline the issues, then be available for questions.
To attend, sign on to Compuserve, and GO: CONVENTION.
EE Times'
on-line forum on Compuserve is called EETnet. Aavid is an innovator in thermal-management solutions for everything from computers to peripherals to motor controls. The company has worked with Apple, AT&T, IBM, Intel, Motorola and Texas Instruments.

Race is on to 0.35
-micron ASICs
By Ron Wilson and David Lammers
MOUNTAIN VIEW, Calif. -- Firing the first salvos in the battle for the 0.35-micron gate-array market, IBM Microelectronics and NEC Corp. are announcing directly competing, but very different, product lines. They are aimed at the cream of the gate-array market: customers who need hundreds of thousands of gates and clock frequencies well above 100 MHz.
Because such huge, fast designs create unique problems, competition in the new segment will be waged more over how those problems are addressed than over chip specifications.
Superficially, the ASIC offerings are similar. IBM's CMOS 5S is a 0.5-micron-drawn, but 0.36-micron/eff, process with gate-array bases delivering up to 1.6 million usable gates. Delay for a loaded two-input NAND driving two loads through 2 mm of metal is 180 ps. NEC's CMOS-9 is a 0.35-micron-drawn, 0.27-micron/eff process delivering up to 1.2 million usable gates. The two-input NAND delay at two loads and 2-mm met
al is about 280 ps.
But beneath the similarities lie profound differences that will form the basis for competition between IBM and NEC and, perhaps, define the debate for the whole deep-submicron ASIC market. That debate will leave some companies struggling for survival.
The prime difference is heritage. IBM's CMOS 5S is fundamentally a 0.5-micron process, derived from the process IBM developed for 16-Mbit DRAM production. In contrast, NEC's CMOS-9 is derived from that company's 0.35-micron, 64-Mbit DRAM process. "This is a completely new technology, not a refinement on an older process," said Christina Smith, product marketing manager for CMOS-9. NEC's gates are drawn at 0.35 micron, but the effective length after processing is only 0.27 micron -- by a wide margin, the shortest gate length for an announced ASIC family.
Hollywood takes position as arbiter of CD standards
By Junko Yos
hida
LOS ANGELES -- It
looks as if the competition for a digital video disk standard won't be a rerun of the bruising and costly VHS vs. Betamax videocassette battle. The reason: Hollywood's movers and shakers joined last week to back a new digital video disk (DVD) system developed by Toshiba Corp. and Time Warner Inc. In the process, they dealt a staggering blow to the competing high-density CD (HDCD) format in the works from Sony and Philips.
CDs with multi-Gbyte capacities are expected to replace VHS videotapes in the consumer market. By using its muscle, the Hollywood entertainment industry may end up crowning DVD a winner without its ever having faced HDCD on the open market.
Joining MCA Inc., MGM/UA, Paramount Pictures Corp. and Warner Bros. Inc. on the DVD bandwagon were consumer-electronics giants Matsushita Electric Industrial Co., Thomson Consumer Electronics, Hitachi Ltd. and Pioneer Electronics.
The Sony-Philips HDCD standard, announced in December, now floats i
n limbo, according to Minoru Morio, executive deputy vice president at Sony Corp., which still carries scars as the loser in the VHS-Betamax struggle.
"The DVD format should be unified and it should be done as quickly as possible," Morio said. "Now, as the two formats are openly proposed, it's time to sit down and discuss." He suggested the possibility of forming a DVD consortium.
Both formats propose 5-inch, double-sided disks, with storage capacities of 10 Gbytes for DVD and 7.4 Gbytes for HDCD. Toshiba and Time Warner have scheduled a worldwide introduction of DVD before June 1996, with a player priced at $499 and disks at $30 each.
More
on the expanded-capacity CD standard.
ComNet builds up NII
By Loring Wirbel and George Leopold
WASHINGTON -- The diffuse elements of the information infrastructure may be coming together,
judging by the activity at last week's ComNet conference. Consider that Asynchronous Transfer Mode (ATM) switches donned new physical interfaces to the data highway; cable providers opened participation in the cable industry's consolidated R&D efforts to information-technology companies, and Internet pundits debated "pay as you go" plans for the global network of the future.
Broadband-switch and inverse-multiplexer vendors touted an array of low-speed ATM approaches. Several semiconductor vendors are already working on standard User Network Interface (UNI) devices for T1 (1.5-Mbit) and T3 (45-Mbit) digital lines. But if ATM cells are simply slowed to sub-1.5-Mbit rates --especially the 64-kbit rate of basic-rate ISDN -- the overhead of the 5-byte ATM header leads to latency problems for isochronous information.
The ATM Forum and Frame Relay Forum have collaborated on some early means of integrating 56-kbit to 1.5-Mbit frame-relay services into ATM networks. In network interworking, frame-r
elay virtual circuits are mapped into ATM virtual circuits, and frames are chopped into cells and reassembled on the other side of the network. The ATM Forum has defined a complex version of that mapping called DXI (for data-exchange interface).
TI breaks $10 for 32-bit floating-point DSP
By Marty Gold and Ashok Bindra
HOUSTON -- Texas Instruments Inc. has smashed the $10 price barrier for floating-point digital signal processors. Hoping to open cost-sensitive, high-volume markets and steal some sockets from RISC CPUs, TI has developed a new member of its 32-bit TMS320C3X family that's as inexpensive as a fixed-point DSP.
TI's major competitors said they will wait to see what effect TI's aggressive price move has on the market.
Until now, many system designers have used high-performance floating-point devices that are typically priced at $25 to $50 and up for R&D prototypin
g, and then switched to fixed-point DSPs for their high-volume commercial runs. TI's 40-MHz 320C32 -- $9.95 apiece for large OEM buys of 250,000 units -- makes the switch unnecessary.
Triton chip set aims for signal-processing speed
By Ron Wilson
FOLSOM, Calif. -- Intel Corp. is storming ahead on two fronts with its announcement of the Triton core-logic chip set for desktop Pentium systems. Addressing one objective, the set will boost Intel's transition from supporting player to industry leader in the fiercely competitive core-logic business. Pushing the second objective, Triton will enhance Intel's argument for native signal processing -- the company's plan to steal the initiative from DSP chips before they can invade the PC architecture.
One of the most important features of Triton is tactical, not technical. It fuels Intel's repositioning of its core-logic business from a necessary
piece of overhead to a profit center. That feat, in the face of broad-based competition and terrible margins in the chip-set market, has depended on Intel designers' ability to get at CPU information more quickly, and interpret it in greater depth, than could most of their competitors.
"A couple of years ago, chip sets were viewed inside Intel as enablers," admitted product manager Jan Camps. "Now they are seen differently. Instead of just bridging the gap between CPU release and the time when the first third-party chip sets get out, we are now pushing the whole platform forward. We are opening more of the potential of the Pentium CPU to systems designers. We don't see other core-logic vendors necessarily pushing as hard as we do on performance."
But that pushing must be done under increasingly tight restrictions. Pentium bus timing is a constant. The use of synchronous burst SRAM cache in high-end systems is a constant. EDO DRAMs are becoming standard for main memory. And the thoroughly define
d Peripheral Component Interconnect (PCI) bus locks down most options in the I/O side of the system. Under all those constraints, it is getting difficult for even Intel to differentiate a product.
Thus, many of the Triton features will look familiar to core-logic viewers. The set comes in the usual four-chip configuration, with system controller, I/O controller and a pair of data buffers. It has an integral PCI bus controller that can accept external bus masters. It is designed to work with burst synchronous, synchronous or async cache SRAMs, and fast page mode or EDO DRAMs. It includes a two-channel IDE controller that acts as a PCI bus master, increasing throughput for high-overhead devices such as CD-ROM drives.
Special Report: Emerging Markets, 1995
By Nicolas Mokhoff
As we herald our annual report on emerging markets, it's become painfully clear that the kinds of markets we cover
have a long gestation period. Multimedia computing, wireless computing and interactive television have been brewing for years under various other labels. The fourth market, that of smart cars (and highways) has an inbred gestation period; it's simply too large and, therefore, is difficult to grow fast.
But 1995 seems to be a watershed year for the three fastest-growing markets, according to the collective research that our editors have analyzed.
Our editors have compiled a comprehensive report with overview articles of each of the four markets, which appear only in the January 30 issue of EE Times. Below are links to supplemental articles that could not make the printed page due to lack of space (oh, what a wonderful media "electronic" is).
The Call for ITV standards
, By Eric Miller, Director of Multimedia, Microware Systems Corp.
Matching algorithm/resource
, By Bruce Thompson, marketing programs manager, Spectron
Microsystems
Wireless-LAN standards
, By Jon Edney, general manager, Symbionics Networks Ltd.
Asking wireless questions
, By Wayne Stargardt, Vice president for marketing, Pinpoint Communications Inc.
|