Memory makers pack in next-gen flash

Encouraged by strong growth prospects, especially in the cell phone market, makers of flash memory devices are focusing on design and packaging strategies aimed at increasing density. Although 2.5 and third-generation (3G) phones may seem far off from a U.S. consumer's standpoint, flash makers are already shipping product for such memory-intensive applications as digital cameras and digital music players; cell phones with color liquid-crystal display (LCD) screens, messaging and Web access; or products with those capabilities in various combinations.

Flash memory vendors, believing entertainment could be the first "killer category," are pushing process technologies to 0.13 micron and operating voltages to 1.8 volts. They are devising new ways to pack multiple bits into a flash cell without the bits interfering with each other (see story, page 72). Memory makers are folding and stacking an increasing number of chips in ever-smaller form factors. They are combining flash with SRAM, psuedo SRAM (DRAM with an SRAM interface) and low-power SDRAM in a single package. And they are speeding access times and ramping volume production lines that, together with precision processes, will enable ongoing cost reduction.

At the cell phone market's high end, the voice, e-mail and color LCD screen applications associated with 3G cell phones currently use 48-Mbit to 64-Mbit flash memory combined with 8-Mbit to 16-Mbit SRAM or pseudo-SRAM, according to Sudeep Sharma, assistant vice president in the memory division of Mitsubishi Electric & Electronics USA Inc.'s Electronic Device Group (Sunnyvale, Calif.).

In the second half of this year and the first half of 2003, the trend will be to produce 64-Mbit to 96-Mbit flash memory combined with 16-Mbit SRAM and pseudo-SRAM, or low-power SDRAM, Sharma said. Midrange and low-end requirements show similar upward trends, according to Sharma.

Flash makers including Intel Corp. (Santa Clara, Calif.), Fujitsu Microelectronics Inc. (San Jose, Calif.) and Sharp Microelectronics of the Americas (Camas, Wash.) focus on process improvements that will yield smaller, more cost-effective dice.

Intel, which pioneered NOR flash technology, last month described a 1.8-V wireless flash memory that will be built on a 0.13-micron process technology, making it four times faster than current flash products. The part, which is sampling now and is due for production in August, should also consume less power than current devices.

Intel's offering targets data-intensive Internet applications on cell phones. The company also promised new packaging techniques, which include stacking multiple memory and memory-logic chips in a single package and stacking folded packages to achieve higher levels of multidice integration and memory density in less space.

"Where 8-Mbit and 16-Mbit devices were the norm not so long ago, 32-Mbit and 64-Mbit devices are common these days," said an Intel spokesman, who added that a 0.13-micron process should soon enable 128-Mbit and 256-Mbit devices. Intel brought its 1.8-V wireless flash lines to a 0.13-micron process last fall, the spokesman said. More recently, Intel migrated its boot block flash products to the finer density, and the company is doing the same for its 2-bits-per-cell Strataflash products.

Fujitsu currently uses a 0.17-micron process to manufacture its NOR flash devices, according to product-marketing manager Keith Horn, but the company expects to be at 0.13 micron by the end of this year. Most of its devices operate at 2.7 V, but it expects to ship 1.8-V devices in volume by the end of the year. "To produce high-capacity devices and lower-voltage devices economically demands that we invest heavily in process technology," Horn said.

Sharp's process lines, now optimized for 0.18 micron, are transitioning to 0.13 micron for faster speeds, lower voltages and greater cost efficiency, said Eric Thun, director of memory marketing.

In packaging, Toshiba America Electronic Components Inc. (Irvine, Calif.) last month launched two four-chip memory devices combining NOR flash and SRAM. The parts, in multichip packages (MCPs) with a length and width of 10 x 7 mm, respectively, combine 8 Mbits of SRAM and 32 Mbits of pseudo-SRAM with two 64-bit NOR chips. The package cuts 30 percent in board space over Toshiba's earlier MCP, said Scott Nelson, flash business director.

STMicroelectronics Inc. (Lexington, Mass.) launched a 3-V, 64-Mbit flash memory chip earlier this year based on a 0.15-micron process that was fully compatible with the 16-Mbit and 32-Mbit devices in the company's portfolio. Available in 80-nanosecond and 90-ns access times, the device features an individual block-locking scheme that allows any block to be locked or unlocked with no latency, enabling instantaneous code and data protection.

Code storage
ST launched a line of 4-Mbit and 8-Mbit serial flash devices last month for code storage. The parts target serial-code download in hard-disk drives, DVD players, graphics cards, printers, wireless local-area networks, asymmetric digital subscriber lines, networking, industrial applications and set-top boxes.

Serial-flash enables program code to be downloaded on power-up from external flash. The use of a four-pin serial-flash interface in lieu of a parallel-flash device with 28 pins or more reduces system pin count requirements as well as board space, power, system noise and cost, the company said.

Micron Technology Inc. (Boise, Idaho) claims its SyncFlash has the highest read bandwidth of any nonvolatile memory, resulting in faster boot times and lower power consumption. Strategic-marketing director Kevin Widmer said the memories target next-gen mobile.

Micron's product replaces standard flash memory and resides on an SDRAM bus, enabling the system processor to execute data at full speed. Widmer said SyncFlash also simplifies code management and system architecture. It needs no refresh to maintain memory contents and can be used in low-powered, handheld apps.

Because of flash's strong consumer product orientation, demand has been cyclical, building in the third and fourth quarters and dipping in the first half of each year, said Erik Aldana, product-marketing manager for flash at Samsung Semiconductor Inc. (San Jose). That was not the case this year.

"Demand for NAND flash is exploding," he said, noting that a shortage started late last year "and is likely to continue for the rest of 2002. We're increasing our capacity but not by enough to keep up." So prices are tightening.

The digital camera market is the major NAND flash driver, Aldana said. The more flash memory available in a camera, the more pictures that can be stored. "Flash has really gained market acceptance, and prices are now where consumers can afford them, which is opening up markets wherever there is a need for portability and reliability," he said. For cell phones, personal digital assistants (PDAs) and the like, the most cost-effective solution is a combination of flash, DRAM and SRAM, depending on specific application requirements.

Smart Modular Technologies Inc. (Fremont, Calif.), owned by Solectron Corp., introduced a 1-Gbyte Type II CompactFlash (CF) 3-V/5-V memory card earlier this year that combines lower-density components with innovative chip-stacking technology. "By using high-density flash in the Type II CF form factor, we are giving our customers the additional memory they need without having to compromise their design," said Steffen Hellmold, director of the flash and SRAM business unit.

Integrated Silicon Solution Inc. (Santa Clara) last month unveiled a line of stacked flash with SRAM multichip packages for 2.5G and 3G cell phone apps as well as PDAs, handheld PCs, GPS, wireless modems, industrial digital video camcorders and handheld industrial digital appliances. The parts combine low-power asynchronous SRAM with 16-Mbit, 32-Mbit and 64-Mbit NOR-type flash in varying densities with top and bottom flash sector configurations in a fine-pitch ball grid array. "MCP modules are more space-efficient for mobile applications requiring high performance and low power consumption," said Sanjiv Asthana, vice president of marketing.

Silicon Storage Technology Inc. (SST, Sunnyvale) last month launched a line of low-density flash memory/SRAM combination memory products in a 6 x 8 x 1.4-mm lead-free ball grid array MCP.

SST said developers can migrate designs from standard flash to flash/SRAM combination memories and maintain the same footprint. "Most manufacturers now concentrate on combining high-density NOR flash with fairly high-density SRAM," said Paul Lui, vice president of SST's special products group. "They ignore a large portion of the industry that requires low-density, low-power flash plus SRAM."

Atmel Corp. (San Jose) is shipping 4-Mbit and 8-Mbit Firmware Hub flash memories that interface directly with Intel's 8xx series PC chip sets and supply BIOS information on the PC motherboard.

John Bryant, vice president of flash memory marketing, said the Firmware Hub devices were developed under an Intel license to ensure compatibility. They have uniform 64-kbyte sectors and automated byte-program and sector-erase operations.

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Company Contacts

AMD Corp.
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Fujitsu Microelectronics
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Intel Corp.
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