3U VPX FPGA processing engine supports FMC-VITA 57 standard

The FPE320 incorporates the largest available Xilinx Virtex-5 FPGAs and an onboard FMC mezzanine site. This combination of high-performance FPGA processing and the flexibility of FMC-based I/O in an air- or conduction-cooled 3U VPX package is intended for demanding real-time applications such as Electronic Warfare (EW) and Signal Intelligence (SIGINT), Electronic Counter Measures (ECM), and UAV sensor acquisition.

In 3U systems, physical board size has limited the use of large FPGAs with larger I/O mezzanines such as PMC/XMC. With the advent of the FMC I/O mezzanine standard, the largest available Virtex-5 FPGAs can be used in 3U systems because the I/O space requirements are minimized. The FPE320 supports Xilinx Virtex-5 SXT, LXT and FXT FPGAs in the FF1738 package and has a single FMC (VITA 57) mezzanine site for I/O. In addition, the FPE320 provides two banks of DDR2 SDRAM and two banks of QDRII SRAM memory along with four x4 high-speed serial interconnects (16 RocketIO GTPs) to the backplane for PCI Express, Aurora, or Serial RapidIO and additional user-defined I/Os to the backplane.

Development for the FPE320 is supported by VMETRO's FusionXF FPGA development kit. FusionXF is a collection of software and associated HDL functions to aid customers in the development of their FPGA algorithms and logic for VMETRO's customer-programmable FPGA products.

Pricing: Starts at $15,000.
Availability: Now.
Datasheet: Click here.

VMETRO, www.vmetro.com