On-Chip PCI: A Good Idea for DSP?

PCI is the leading bus and DSPs are the fastest growing processor technology. So integrating PCI with a DSP on-chip should be a marriage made in silicon heaven—or is it silicon hell? To some, on-chip PCI is an idea whose time has come. To others, it's an idea whose time has gone. The question of PCI on-chip is now a good one, as silicon densities can now support it.

As fourth generation DSPs take on more tasks, they can take advantage of PCI's bandwidth. TI is betting on the side of on-chip PCI controllers for DSPs with its now available C6205, which integrates a 200-MHz VLIW DSP with a PCI controller. This PCI controller gives the DSP chip a high bandwidth bus connection, 64-bits at 66-MHz, some 264-Mbytes/sec of peak throughput. Moreover, this is a universal connection, not a specialized bus that requires board-level glue logic to integrate it with the rest of the SBC components. Thus this PCI connection makes it easy to add a C6x, connecting to both input and output streams on PCI.

On-chip PCI isn't new. In fact, years ago it almost crippled DEC's (now Compaq's) Alpha RISC processor effort. At the time, PCI was the first PC technology that the embedded folks decided to co-opt, rather than wait for it to mature on PCs. And so DEC engineers put a PCI controller in its early Alpha RISC chips. Unfortunately, PCI was then an evolving spec (and perhaps not fully understood by the design community) making it difficult to finalize that Alpha silicon.

The lesson learned was not to put unstable bus controllers onto processor silicon, which constitutes the most expensive silicon real estate around. Instead, it is better to put controllers into less expensive controller or chip set silicon. And this was especially true for desktop PCs and Pentium servers that use a chip set anyway. This approach put the risk on the chip sets, which are less complex, have shorter development cycles, and are designed for scalability.

Today, of course, PCI is a known, stable (but not necessarily simple) technology and de facto bus standard. People can either roll their own or buy PCI controllers. At the same time silicon densities and chip pinouts have reached the point where there's room for a PCI controller, especially for SoCs that integrate one or more processors with their I/O peripherals. As a consequence, PCI is moving back onto processor silicon, especially in the embedded arena.

A surprising number of embedded processors and controllers rely on on-chip PCI controllers. These PCI-equipped processors range from SoC communications controllers to large, high performance MP systems-on-a-chip. Moreover, a proliferation of different processor designs, especially high-end MP architectures, has increased the use of PCI as a common interconnect mechanism. For these architectures cannot expect designers to accommodate proprietary off-chip bus architectures. For them, PCI serves as a common, bus connection, one with a standard, low cost bus interface.

And on the system side, Sun Microsystems has shifted from its proprietary SBus as an I/O bus to PCI. In fact, the company has put PCI on some of its UltraSPARC RISC processor chips. For example, the UltraSPARC IIi, which targets SBCs, has an on-chip 32-bit, 66-MHz PCI controller. Sun supplies a companion bridge chip that bridges that on-chip PCI connection to two 32-bit, 33-MHz PCI buses.

Company	Chip	PCI	Comments
BOPS	Mantra	32-bit, 66-MHz	Specialized, scalable DSP processor with multiple execution engines.
Chameleon	CS2000	32-bit, 66-MHz	Reconfigurable com processor with ARC RISC CPU and layers of execution cells and FPGA-like interconnect.
IBM	PowerPC 440GP	64-bit, to 133-MHz PCI-X	32-bit PowerPC for SoC network applications. First chip to have PCI-X bus controller.
IDT	R32334	32-bit, 66-MHz	32-bit scalar MIPS RISC processor targeting network apps with low-cost controller.
Intel	i960 (803xx)	To 64-bit, 66-MHz	32-bit RISC used as an intelligent I/O controller. Some chips function as PCI bridges with two PCI interfaces. I²O compatible.
Lexra	NetVortex	32-bit, 66-MHz	Scalable network processor with multiple MIPS CPUs on a central bus. PCI I/O controller on bus.
NEC	VR4122	32-bit, 33-MHz	64-bit MIPS RISC targeting portable and embedded aps. NEC supplies companion chip set with USB, audio, A/D and D/A, PC bus controller.
Sun Microsystems	UltraSPARC IIi	32-bit, 66-MHz	Version of UltraSPARC integrated with I/O for board-level products. Sun supplies PCI bridge chip to for on-chip PCI bus.
Texas Instruments	C6x205	32-bit, 33-MHz	16-bit, fixed-point VLIW DSP. Targets SOHO and PC telephony apps that need system integration with PCI.
Toshiba	TMPRE3927	32-bit, 33-MHz	32-bit scalar MIPS RISC for embedded apps. Includes SDRAM controller, UART, DMAC, and counter.

Table 1: Representative embedded processors that incorporate a PCI controller on-chip

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In addition, there are a lot of PCI support chips for mainstream processors. Many of these chips will move onto the processor chip itself as silicon densities and chip pinouts continue to rise. Small system SoCs, such as those for handhelds, portables, and some games, will not need the PCI bus. However, SoCs for larger, MP class systems will need PCI for system I/O and subsystem interconnectivity. Even newer intersystem connections like InfiniBand will use PCI (or PCI-X) on the inside to connect to the InfiniBand controller.

Now a stable bus technology, PCI controllers are available as IP for both ASICs and FPGAs. For example, both Altera and Xilinx have PCI controllers as deployable IP for their large FPGAs. Thus, FPGA designers can add a PCI controller without having to design one; they just license its IP and integrate it into their designs. Similarly, PCI IP is available for custom and gate array ASICs.

And this PCI IP is increasingly being deployed in integrated SoCs that take advantage of today's high silicon densities and clock rates. With both ASICs and FPGAs, engineers can now build true SoC systems. These SoCs range from a RISC with peripherals to a full MP architecture, systems bus, and I/O. And many such designs, especially the larger systems, feature an on-chip PCI controller for I/O and connectivity. Thus, PCI on-chip with processors is already a fact.

The real game is easy connectivity. And PCI's interface provides a common standard interface, defining a standard 32-bit/64-bit interconnection mechanism for most 32-bit and above systems. Moreover, PCI has become the common, multi-level bus, providing systems, I/O, mezzanine, and crate-to-crate connections. Thus PCI is easy to find, it exists at every bus level in a system.

Given PCI's ubiquitous connectivity, the question for DSPs is do they need the PCI systems connection? And increasingly, the answer is yes, especially for higher end systems that support MP and integrated local host processors. PCI provides a high-level interconnection mechanism. And DSPs, which typically operate without a chip set, more and more find themselves integrating with PCI subsystems. TI is betting designers need DSPs with an on-chip PCI controller. They may well be right; they are certainly joining a growing trend.