Test Trade-Offs at ITC 2001

This year's International Test Conference was held in Baltimore the week of October 29. The theme, "Tackling Test Tradeoffs," was ever-present, from the keynote address to the technical paper and panel sessions, to the products offered by the exhibiting companies. The economy, the events of September 11, and Halloween all took their toll on attendance, but the reduced crowds were treated to an excellent technical program and plenty of attention on the exhibits floor.

Sue Billat, managing director at Robertson Stephens, set the tone for the conference with her keynote address on "Test Tradeoffs—The View from Wall Street". "Wall Street understands more than you think about the industry—but less than you might like about your company," Billat pointed out. She described the current trend to the dis-aggregation of the semiconductor industry, along with outsourcing fabrication, test, IP, and more. According to Billat, "the Street" views ATE as an early indicator of market trends, but notes that it consistently lags the rest of the industry in performance. This results in a consistently lower market cap/sales ratio for ATE than for front-end equipment makers while these, in turn, are lower than those of design-automation companies.

Sue Billat's keynote was followed by an invited talk from IBM's Phil Nigh, "Today's Test Choices: Anticipate, Adapt, Partner ... or Perish". Phil expanded on Sue's theme of dis-aggregation, showing how in a complex supply chain, no single company owns quality from beginning to end. Partnerships and innovation are needed to keep pace with the changes in both business and technology if chip vendors are to retain control over quality.

Some test tradeoff discussions have continued for decades, but this year provided new twists. At a panel entitled "Structured Test—Then and Now," Ed Eichelberger, a pioneer of the LSSD scan methodology developed at IBM, revealed that he personally prefers functional testing to structural testing. Eichelberger and Navid Shahriari, test manager at Intel, agreed that what drove their respective companies to use structured test was the economic non-feasibility of generating functional tests (for 1000-chip systems at IBM in the 1970s and for complex microprocessors at Intel today).

No such resolution was found in the ongoing debate between low-cost and high-performance ATE. A panel, organized by Texas Instruments' Anjali Kinra was advertised as searching for common ground on the subject, but while the panel discussion was lively and entertaining, not much common ground emerged. Audience members who continued their search on the exhibits floor found several low cost ATE vendors, as well as low-cost offerings or at least discussions from the high performance companies (for a wrap-up of the ITC exhibit floor, read Jim Lipman's ITC 2001 Emphasizes More Cooperation, Less Test Cost).

Another perennial trade-off, IDDQ testing, was recast as energy consumption in an interesting paper given by Eric Peterson of Guidant. Boundary scan was given an exciting new twist with several papers on "AC JTAG", JTAG on high-frequency AC-coupled nets where static testing is not possible. Tester utilization was also a recurring theme, with papers and exhibits on reducing test data volume, improving the connection between ATPG and ATE, and special purpose on-chip hardware to reduce test cost. ITC also broadened its scope with a paper session and workshop on RF testing. Look for each of these topics to provoke more papers, products, and panels at next year's ITC, to be held October 8-10, 2002, again in Baltimore.