Leading-Edge Motor Control Designs Mix DSP and MCU Advantages

The trend toward more efficient, smaller, and quieter motors for white goods and other cost-sensitive, feature-rich applications is increasingly putting the design spotlight on a hybrid processor architecture that combines DSP computation power with the control efficiencies of MCUs.

Although the Digital Signal Controller (DSC) architectures vary among competing semiconductor companies, they typically exhibit five common characteristics:

• A DSP core with multiple buses and single-cycle MAC capability to handle complex motor control algorithms
• Sophisticated interrupt handling ability typical of MCUs
• Sets of control-oriented peripherals such as ADCs and PWMs
• Flash memory for faster debugging and easy in-field software updates
• Easy to use development tools and libraries of motor control oriented transforms.

Motor control applications have, of course, traditionally resided in the MCU space. They employ scalar control such as adjusting the frequency of a frequency converter to control rotor speed. Scalar control is not computational intensive—but it is not very sophisticated, either, and this can have disadvantages.

Evolving consumer demands and competition between white goods manufacturers are driving the trend toward more supplicated motor control. Manufacturers see the advantage for introducing life-style-oriented features such as low noise and soft start, off-balance detection, and faster drying. Design teams must find ways to make it happen.

Sophisticated algorithms for precise, energy-efficient motor control have been around for a long time. The implementation problem was cost. MCUs simply did not have the computational horsepower to meet the demands of the Clarke and Park transforms, to cite just two examples.

Steve March, Director of DSC Strategic Marketing for Microchip, cites vibration control, arc-fault detection, power management in products, such as uninterruptible power supplies, and even large LED lighting displays as prime DSC markets beyond motor control. But he adds that, in general, DSCs are potential solutions for most "things that move" and are electronically controlled.

Rich Hoefle, systems and applications engineering manager of Freescale's hybrid controller product line, adds V.22 modems and vacuum cleaners to the list. Hoefle's view of the ideal DSC architecture is a core with the Harvard architecture typical of DSPs but augmented with a large number of register sets to handle instruction branching and the advanced memory management characteristics of MCUs.

Kedar Godbole, Digital Control Systems Applications Engineer in Texas Instruments' DSC group, describes the Clarke and Park transforms as "at the heart" of a modern field-oriented control algorithm.

While there are many potential system-level architectures for motor control, a good example is one suggested by Texas Instruments that employs the Clarke and Park transforms adapted to motor control in its TMS320C2000 platform. The system-level design is illustrated in Figure 1.

Figure 1:  Vector-controlled motor based on Clarke and Park transforms. (Source: Texas Instruments)

The goal of sophisticated motor control is to maximize efficiency—basic operations such as on-off control and safety monitoring are a given. To maximize efficiency, the motor's stator currents must be adjusted to keep the angle between the stator flux and rotor flux as close to 90 as possible. Instead of attempting to control the three phases that power the stator independently, the system illustrated in Figure 1 begins by mapping them as a single space vector.

Many of the functional blocks shown in Figure 1 require intensive mathematical computation. The key blocks, however, are the Clarke and Park transforms (yellow blocks). They transform stator currents into the rotor domain.

This lets the system determine and adjust the stator voltages needed to maximize torque under dynamically changing loads. Both the Park and the inverse Park transforms must know the rotor flux position. The flux estimation block accomplishes this task with an algorithm that uses the same stator current measurements that are used as inputs to the Clarke transform as well as the corresponding stator voltages.

The speed regulator block compensates for overestimating or underestimating rotor torque in comparison to the load torque. Motor speed will rise if the system is producing too much torque and slow when too little torque is being produced. Estimating the correct speed and supplying that estimate to the overall calculation mitigates these effects.

Traditional PI regulators control the estimated flux angle and torque using feedback from the other functional blocks. After the estimated feedback values are used by the inverse Park transform, the stator current values are converted from a single space vector back to spatial coordinates so each phase can be individually powered by the appropriate feedback voltages. A pulse-width modulation (PWM) block is used to generate the actual stimulation voltages.

Since the processor must run the entire algorithm quickly (about 50 ms), signal processing architectures are required. However, motor control is not ideally suited to traditional DSP architectures because they are not efficient at handling interrupts and because motor control algorithms tend to be point-to-point algorithms that process one set of data samples at a time, which means DSP-like parallelism is not especially helpful and the DSC core has to be altered accordingly.

Microchip's Steve March, for example, says the company's strategy for its dsPIC30F platform is to make it look and feel as much like an MCU as possible for design teams that are in the process of transitioning from MCU to DSC architectures. Designers use the same integrated development environment as they use the company's PIC microcontrollers, the registers have the same naming conventions—although there are more of them in the dsPIC—and a lot of effort was put into creating a C compiler to avoid having designers write in assembly language.

Freescale and TI make much of the same claims for their MetroWerks and Code Composer Studio integrated development environments. Only a careful analysis in the context of a design team's background and special needs will show which choice is better for a particular design team.

Figure 2:  Freescale offers many peripherals in its 56F8100 platform (Source: Freescale Semiconductor)

Besides peripherals, judicious integration of Flash is a key success factor in motor control applications. With just the right amount, page size, and security features, Flash can add performance and deliver more system features at the lowest possible cost—and with the highest programming efficiency.

Freescale offers Flash in four configurations for its 56F8100 platform: 32, 128, 256, and 512 KB of program Flash. Each configuration is available in at least two different packages. Security features prevent the unauthorized reproduction of the design team's IP.

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Texas Instruments offers 16, 32, 64, and 128 KB program Flash options in its high-end 320C2800 32-bit platform and 8, 16, and 32 KB options in its 16-bit TMS320C2400 platform. The 320C2800 platform offers code security. Microchip offers 12, 24, 48, and 144 KB Flash options in its dsPIC30F platform.

Since Flash is expensive to integrate and is primarily used as program Flash, code density is an important consideration. The most important consideration in maximizing code density is the chip's architecture, which determines its word length. Freescale and Microchip both base their motor control controller offering in 16-bit, fixed-point architectures. TI has two families, the 16-bit TMS320C24xx platform and the 32-bit, fixed-point TMS320C28xx platform.

TI's Godbole acknowledges that, in the past, code density for 32-bit processors has been a critical issue for low-cost applications. To address this, TI uses a technique called instruction packing, which means that a carefully chosen mix of 16- and 32-bit instructions is used and 32-bit instructions are used only when the amount of information requires it. TI packs plenty of MIPS into its DSCs: 20 to 40 MIPS for the C24xx platform and 100 to 150 MIPS for its C28xx platform.

Hoefle says that Freescale's hybrid architecture keeps it competitive with pure 32-bit RISC architecture CPUs and, although the core can clock as high as 120 MHz and deliver up to 200 MIPS, most motor control applications fall in the 30 to 40 MIPS range. The 56F8100 platform addresses the lower range.

Freescale's 56F8300 platform handles the higher end that requires more Flash memory, wider temperature ranges, and dual CAN interfaces. It is focused on industrial motor control as well as applications such as electronic currency recognition for vending machines.

At Microchip, the dsPIC30F platform runs at 30 MIPS, says March, but its highly effective features such as fast interrupt handling and interrupt avoidance help it benchmark very well in compiler benchmarks for motor control specific applications.

Switched-reluctance motors can operate at speeds above those of induction motors and they can also deliver superior torque and have high energy efficiency. The problem has been that the electronics associated with switched-reluctance motors has, in the past, cost as much as the mechanical components. The emergence of DSC, or hybrid, controller chips may answer the cost/benefit challenge.

DSCs can be purchased in quantities from $2 to $15 each but not all of them can handle the demands of a switched-reluctance motor.

• Performance: Whether it comes from raw horsepower or clever design, number crunching capability must be clearly superior to anything that can be offered by a comparably priced MCU. 30-40 MIPS will handle most applications but 32-bit powerhouses can churn out as much as 100 MMACS.
• Ease of Use: All three IC companies interviewed for this article are tightly focused on this issue because their target design teams are most frequently familiar with MCU software development and code density. Each company also has wide libraries of motor control transforms and algorithms available. Integration is also important. Due to space and cost constraints, motor control systems need controllers with key components—such as Flash, ADC, PWM, Sensor interfacing, and communications—all on one chip.
• Price: Covering a broad price range, successful products have to offer the best balance of price as well as the ability to take on modern motor control algorithms and reduce system cost.

Electric motors account for more than 50% of U.S. energy consumption. But most motors used in the home typically have operating efficiencies in the 40% range—a prime opportunity for reducing power use.

Smarter control technologies can raise operating efficiencies into the 90% range, but require computationally intensive algorithms. By running the algorithms in a matter of microseconds and integrating the right mix of peripherals, DSCs, or hybrids, optimized for motor control, will usher in a new era of green motors.

Contributing writer Jack Shandle is a former chief editor of both Electronic Design magazine and ChipCenter.com. He holds a BSEE degree and has written hundreds of articles on all aspects of the electronics OEM industry. Jack is president of e-ContentWorks, a consultancy that creates high-value content for publishers, eOEM corporations, and industry associations. His email address is jshandle@earthlink.net.