No nanoelectronics technology can replace CMOS until 2030, says TI exec

SOPHIA ANTIPOLIS — Fifty years ago, Jack St. Clair Kilby, working for Texas Instruments Inc. (Dallas, Texas), invented the integrated circuit. At the SAME Forum, in the Science Technological Park of Sophia Antipolis, South of France, Dennis Buss, chief scientist at TI, gave a retrospective look and a prospective analysis of the semiconductor industry as Moore's law is expected to stagnate toward the end of the next decade.

Looking back on 38 years of history, and more precisely 38 years of semiconductor scaling, Buss highlighted that, at every generation, feature size shrinks by 70 percent, transistor density doubles, wafer cost increases by 20 percent, and chip cost comes down by 40 percent. Generations, he continued, occur regularly, on average, every 2.9 years over the past 35 years. Recently, it has occurred every 2 years.

Continuing his comparisons between the year 1970 and today, Buss underlined a 10,000x increase in clock frequency, a 1000x increase in power dissipation, a 100x increase in fab cost and, on another level, a 400x increase in worldwide IC revenue, from $700 million to $270 billion, and a 25x increase in worldwide electronics revenue, from $70 billion to $1.6 trillion.

"We are definitely heading for a change," asserted Buss in his keynote speech. There are three reasons for that. Firstly, the gate insulator is a few atomic layers thick, and cannot be scaled much further. Secondly, transistor parameter variation from device to device is increasing.

Thirdly, the cost of designing a new product in state-of-the art technology is escalating. "When I started at TI, I could design a chip from the beginning to the end. Today, we have teams of hundreds of people," Buss commented.

He added: "My view is that the end of the roadmap is not hitting a wall, as some people say, but a swamp. We need to push CMOS as far as we can to the end of the roadmap and invent new generation electronics. I think there is no end to the industry. Medical electronics, energy scavenging, energy storage or generation […], they do not need to be at 10-nm."

Expressing himself on R&D strategies with regard to core CMOS, Buss said the high cost of developing new technologies is leading to R&D partnerships to share development costs. Besides, the high cost of designing products in the most advanced technology is slowing the adoption of these technologies.

Except for very high volume products, he continued, being first with a new technology does not provide the cost advantage that it once did. And, being a technology leader in core CMOS technology is becoming less of a competitive advantage.

In the end, Buss noted that R&D efforts that were formerly spent on developing core CMOS technology are now being used for differentiated technologies such as analog, radiofrequency and MEMS, and for product design and development.

"Since CMOS scaling will stagnate within the next ten to fifteen years, researchers are seeking a replacement for CMOS," Buss declared. "By the time CMOS scaling ends, we will have the capability of producing chips with 100 billion transistors for $1.00."

Still looking ahead, Buss gave his predictions regarding nanoelectronics. He said he believed that there is no nanoelectronics technology that has a chance to replace CMOS until 2030 at the earliest. Nanotechnology, however, may be used to augment CMOS (i.e. embedded memory, micro and nanosystems).

"The device that will replace CMOS has not yet been invented," stated Buss. "MOS-like switches will never replace CMOS. The critical problem to be solved is a switch that switches five orders of magnitude of current in 100mV or less. Candidates include tunneling devices and cooperative devices."

Moore's law, Buss concluded, is predicted to stagnate toward the end of the next decade but continued IC cost reduction and growth in capability will result from integrated microsystems and specialized nanoelectronics technologies on CMOS. "There is hope for continuous growth in our industry," he ended.