News & Analysis

Yogitech presents IP solution for safety-critical systems

Anne-Francoise Pele

1/29/2007 10:44 AM EST

PARIS – Design and verification technology provider Yogitech SPA announced Monday (January 29) it has introduced a new family of fault supervisors for memory subsystems, aimed to accelerate next-generation automotive design.

Dubbed fRMEM, Yogitech’s family is available for SRAM connected to the system bus, for Tightly coupled memories, caches and for non-volatile memories (Flash, NAND Flash, and EEPROM). It also allows interoperability with external Built-in-Self-Test or Built-in-Self-Repair modules, said the company.

fRMEM, claimed its developer, is an IP providing, on top of EDC/ECC, a set of proprietary techniques to fulfill the limitations of a pure EDC/ECC based solution, thus accelerating the implementation, for instance, of automotive safety-critical systems in chassis and passive/active safety as braking control, ABS, ESP.

Yogitech (Pisa, Italy) also indicated that SIL3 compliance is ensured by an enhanced protection and a self-checking architecture for the supervision circuitry itself.

“fRMEM is the first IP in our faultRobust technology roadmap: further IPs protecting CPUs, busses and peripherals are in an advanced stage of development and will be introduced in the market during 2007 extending meaningfully our SIL3 compliant IP portfolio for automotive safety-critical systems”, commented Silvano Motto, CEO of Yogitech, in a statement. “Yogitech is going to play a key role in enabling solutions in accordance with IEC 61508 standard and related derivatives applied to System-on-Chip conception and design.”





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