TSMC launches 0.15-micron process

TSMC launches 0.15-micron process
SAN MATEO, Calif. — Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) announced today (March 15) the availability of its 0.15-micron process, and said that Altera Corp. is among the initial customers for the process.

In preparing 0.15-micron wafers for Altera (San Jose, Calif.), officials at TSMC (Hsinchu, Taiwan) said they had achieved yields comparable to those with its 0.18-micron process.

TSMC is the first pure-play foundry to announce a 0.15-micron process, but competitor United Microelectronics Corp. (UMC) is on its heels with its work on a 0.13-micron process, based on a development alliance with Infineon Technologies AG and IBM Corp. The trio's 0.13-micron process is due to be available to some developers in the second quarter of this year. Prior to announcing the alliance with IBM and Infineon in January, UMC had said it would have a 0.13-micron process in production by early next year.

Only TSMC's Fab 3 facility is qualified for the company's new 0.15-micron process, although three other fabs are expected to pick up the process by the end of the year.

Volume production on the 0.15-micron process is expected to begin in the third quarter of 2000. TSMC said three customers aside from Altera have completed tape-out on the process, with four other customers ready to finish tape-out in April.

Altera will examine the use of copper interconnects in the 0.15-micron process but still hasn't decided whether to use the copper technology at that point. The company separately has committed to using copper interconnects at 0.13 micron and is due to receive a 400,000-gate test chip from TSMC on that process later this year.