Foundation laid for crosstalk avoidance

Foundation laid for crosstalk avoidance
We have entered the interconnect-centric design paradigm. Connection with interconnects and smaller geometries has become a key design issue, and crosstalk is the most commonly referenced signal integrity effect.

The four effects of signal directions, switching times, driver strength and near/far-end are needed to model the crosstalk effect. However, the practice of post-layout analysis and manual fix is not acceptable due to long design cycles. Existing place and route solutions of defining the maximum parallel length constraint or fixing crosstalk problems with a detailed router can overconstrain the problem such that a solution is not available.

What's needed is a crosstalk-avoidance approach that analyzes the effects of crosstalk during global placement, assigns routing resources for critical paths with the global router and then resolves crosstalk problems with a crosstalk-aware detail router.

Basically, the crosstalk effect is a combination of static and dynamic behavior of signal switching. In the terminology for crosstalk analysis, the signal nets are classified as aggressors or victims. Each signal is analyzed as a victim with all the neighboring nets functioning as aggressors. When the victim net is quiet, or if there is a separation of the switching windows of the victim net from the aggressor nets, crosstalk can be analyzed statically. If the aggressor nets cause enough voltage variation in the victim net, a change in the digital state-from level one to zero, or vice versa-is propagated to a flip-flop, and a fault is generated due to crosstalk.

In many cases, the crosstalk effect can cause significant differences in the timing of the switching waveform of the victim net when the switching windows of the aggressor nets and the victim net overlap. When the aggressor nets switch in opposite directions to the victim net, the victim net can have a significantly longer switching time and can cause setup time violations at the flip-flops or latches, or output timing window error. When the aggressor nets switch in the same direction as the victim net, the victim net can have a significantly shorter switching time. This can cause hold time violations at the flip-flops or latches.

It has been demonstrated that delays caused by the overlapping of switching windows cannot be modeled accurately by replacing the cross-coupling capacitance with a grounded capacitance (2x for opposite-direction switching and 0x for same-direction switching). The ratio of cross-coupling capacitance to the total capacitance value of a net is an important variable in the analysis of the crosstalk effect. The ratio can provide qualitative information and is helpful as a screening variable. However, the ratio cannot be used quantitatively to determine the severity of the crosstalk effect. An analysis tool that can simulate the dynamic switching speed is necessary for correct modeling of the crosstalk effect. The switching time of the aggressor net is important in determining the effect of any crosstalk delay on the victim net. There can be significant delays of time based on the switching time of the aggressor input.

Accurate modeling of the crosstalk effect will require consideration of four modeling effects:

• The direction of the signal transitions of the victim and the aggressor nets have a strong influence on the switching time of the victim nets.
• There is also a very strong dependency of the waveform of the victim net based on the relative switching time of the aggressor nets. Due to the reciprocal relationship between the aggressor and the victim nets, there is also a dependency on the switching windows of the aggressor and victim nets. (A good reference on a special algorithm to determine the coupling effect can be found in "TACO: Timing Analysis with Coupling," by R. Arunachalam, K. Rajagopal, L. Pileggi, DAC 2000, Session 16.)
• The strength of the drivers to the victim and aggressor nets must be considered.
• The location of the coupling of the aggressor nets to the victim nets also needs consideration. This is known as the near- and far-end coupling effects. The switching activity of the aggressor net will have a larger effect on the victim net if the coupling location is far away from the driver of the victim net. This will require accurate extraction of the distributed cross-coupling RC of the nets so that this effect can be modeled.

Existing solutions for crosstalk operate mainly at the post-layout stage. A transistor-level simulator (Spice) with the appropriate vectors typically is used to analyze this crosstalk effect in order to identify the problem at the post-layout stage. The problem is fixed by modifying the layout. During the last year or so, there have been additional simulation techniques to analyze the timing effect by using a static timing analyzer at both the transistor level and the gate level, or through a special simulator that can identify noise issues. However, the analysis procedure for capacitance crosstalk effect is tedious and any identified problem requires extensive effort for fixing the problem. Manual fixing is only feasible for a few nets. Since this requires sequential steps of fixing and verification, the iteration can result in long design time.

Since the post-layout fixing is not a desirable approach, different approaches of using the detail router to resolve crosstalk problems are being implemented in some place and route tools. One of the common methods is to constrain the maximum length of parallel routing between any pair of nets. However, this method, based on empirical data, does not reflect the physics of crosstalk that include signal-switching window dependency. This method can be overconstraining since the crosstalk effect is a problem only for additional delays in critical paths or noise, which can change state at the registers. In addition, medium-length nets with crosstalk may not be identified and the problem remains.

Another method is to use a rule of thumb to determine the significant crosstalk criteria-threshold parallel distance-and provide the information to the detail router. The detail router then invokes the crosstalk analysis function. For identified crosstalk problems, the router tries to modify the layout by providing more spacing between the affected signals or by switching the nets to different layers. For many high-performance and/or complex designs, this may require a major rip-up and repair effort with no guarantee of fixing the problem automatically.

Intelligent detail routers that understand crosstalk have been reported in literature. However, this can still overconstrain the design and leads to routing congestion. In addition, if the information of arrival time of the nets is not available, the crosstalk estimate will need to be very conservative, which also may produce routing congestion.

Fixing the crosstalk issue at detail routing or at post-layout stage is too late. Using an analysis tool in the post-layout stage is definitely not acceptable due to the impact on the design cycle time.

The appropriate approach is to address crosstalk issues early in the design cycle and implement crosstalk avoidance during the placement and global routing stages, where there is enough flexibility to allocate resources to remedy crosstalk problems. During the optimization stages, the physical design can then be optimized with respect to connectivity, timing, congestion and power, including analysis and planning for crosstalk.

The foundation for developing crosstalk solutions is an integrated, incremental static timing analyzer that understands crosstalk, together with an accurate built-in cross-coupling RC extractor. The physical design system needs to include a crosstalk-aware static timing analyzer that generates the switching timing window for each net. Since there is no detail routing at the placement and global routing stage, a statistical method can be used to identify crosstalk effects.

The signal switching windows are used to assess the crosstalk interaction between signals. A switching-window density histogram then identifies the crosstalk-delay impact to the switching net.

Signals that are vulnerable crosstalk victims will have more routing space assigned during global routing. The space is used to add spacing around the crosstalk victim or for rerouting by the detail router. The crosstalk timing analyzer will also guide the detail router such that the routes will eliminate the crosstalk impact to critical path delay. The appropriate detail router will need to be a shape-based gridless area router, with variable width and variable spacing, that can effectively address crosstalk problems.

The same coupling-effect analysis is used for noise analysis. The waveform calculator within Dolphin, Monterey's Physical Design software package, will calculate the amplitude of the induced noise on the victim net. If the noise is larger than the threshold associated with the cell driven by the net, a violation will be generated and resolved by the crosstalk-aware detail router.