Performance analysis spots system bottlenecks

Performance analysis spots system bottlenecks
Santa Cruz, Calif. - Mentor Graphics Corp. this week will announce a system performance analysis capability that extends its Seamless hardware/software co-verification system into a new realm. Seamless Version 5 lets designers look at code profiling, memory transactions, bus loading and bus arbitration delay, the company said.

Performance analysis provides a look at the throughput of data in a system and identifies possible bottlenecks. The task is generally performed by systems architects, though with few automated tools. But Seamless has had performance data "under the hood" for many years, and Mentor recently decided to create some ways for users to see it, said Seamless product manager Jim Kenney.

Version 5 has four display windows that show performance analysis. One offers code profiling by identifying which software modules in a system consume the most CPU time. In this window, one chart shows the percentage of time each software routine takes; another presents more of a sequential view, showing when routines were called and how long they took to run. "You can drop a cursor into the graph and see which software routines executed at a given point in time," Kenney said.

A second window tracks memory transactions by displaying the cache effectiveness of software modules. Users can examine cache hits and misses, and look at cache reads and writes. As a result, users can tune algorithms or decide to increase the cache size.

Who's waiting?

A bus-loading window identifies the bus bandwidth consumed by each module. Here, designers can determine whether the most-critical functions are getting enough bandwidth.

Finally, a bus arbitration delay window displays how long each master waits for a bus grant. "This display allows you to quickly see who's waiting for the bus and how long," said Kenney. "You might decide to use a different arbitration scheme."

Data for the four windows is collected during simulation, and there's probably just a 1 or 2 percent performance hit, Kenney said. "You can see the displays update as simulation runs, but I'm guessing most people will look at the data after they get to a certain point and stop the simulation," he said.

Kenney said users needn't do anything to run performance analysis, with one exception-to get bus-loading information, they need to place a simple bus monitor in the design. Users can turn the displays on or off.

Seamless Version 5 also offers the product's first native support for SystemC simulation. It's more direct than connecting to SystemC through Mentor's C-Bridge application programming interface, Kenney said. Seamless Version 5 is available now as a no-cost upgrade for current Seamless licensees. A Mentor Graphics tutorial on performance analysis can be found online at www.EEdesign.com.

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