Tool flow gets physical, with Cadence's help

Tool flow gets physical, with Cadence's help
ATI Technologies Inc. has woven together a new physical-design tool flow developed in partnership with EDA giant Cadence Design Systems Inc. The Canadian company's 175-person team in Silicon Valley will use the flow for all of ATI's high-end graphics processors as it seeks to keep pace on one of the semiconductor industry's most grueling treadmills.

"There has been a lot of logical reuse and less physical reuse [at ATI] to date. [But] we have invested fairly heavily in tools that will allow us to do more physical reuse," said Greg Buchner, a chief technology officer at ATI.

ATI's 20-person Santa Clara, Calif., CAD team recently finished work on the new flow based on a combination of Cadence's physical-design tools and in-house tools that could enable ATI to see its first real reuse of hard intellectual-property (IP) blocks. The flow is now being applied to at least two unannounced ATI chips.

Crafting that flow while still cranking out new designs was "the equivalent of rewiring your house while the lights are on," said Dave Rolston, who manages ATI's Santa Clara design center.

Graphics companies are perfect targets for design reuse. That's because they use a waterfall design scheme that starts by building a high-end graphics core and then delivering over time products based on it for as many as eight market segments, including mainstream and low-end PCs, notebooks, integrated chip sets and consumer products.

Ironically, though, there's little physical reuse in graphics. "In our devices, assuming you are using the same process technology, hard-IP reuse is restricted to RAM, PLL and I/O cells. That type of reuse is pretty small," said Chris Malachowsky, co-founder and a vice president of engineering at ATI's archrival, Nvidia Corp. "Our type of reuse is more leveraged reuse [at the soft or logical level]. You tend to tweak almost everything."

Graphics companies have plenty to tweak. "We create chips that contain more logic than a Pentium but must sell for an order of magnitude less. I don't know if this will be sustainable going forward but we are charging ahead," said Bob Feldstein, vice president of engineering for ATI's Marlborough, Mass., team, which is designing its R500 core, probably aimed at release in about 2005.