News & Analysis
Artisan signs library deals with Cadence, Synopsys
Richard Goering
11/18/2002 4:00 PM EST
SAN JOSE, Calif. Aiming to provide signal-integrity sign-off for deep-submicron designs, Artisan Components Inc. has signed separate library deals with Cadence Design Systems Inc. and Synopsys Inc. The agreements are intended to provide greater modeling accuracy for sub-130 nanometer designs.
Artisan Components announced a five-year agreement with Cadence Design on Monday (Nov. 18) to jointly develop intellectual property (IP) libraries, design technology and semiconductor process data. As a first step, Artisan will extend the models in its standard cell and memory libraries to provide the detailed characterization data required for Cadence's signal-integrity solution. Artisan will use Cadence's Spectre circuit simulator for the recharacterization.
Last Thursday (Nov. 14), Artisan announced that its libraries will be available with signal-integrity and noise-analysis support for Synopsys' Liberty open library format. The two companies have cooperated to define the new noise-modeling capabilities in Liberty; beta testing of tools and libraries with mutual customers is expected to start before the end of the year.
"Both Cadence and Synopsys realized that they've got to get library providers to help them, because without IP this won't work," said Jim Hogan, senior vice president for business development at Artisan. Hogan said the two agreements are "pretty much the same," although the Cadence agreement extends a little further.
"Cadence will work with Artisan to do a lot more of what the ASIC guys used to do: better support, ensuring that tool flows work together, IP and tool support we're kind of getting at a virtual pure-play supply chain," Hogan said.
Cadence customers will use the signal-integrity library views provided by Artisan as part of the Cadence Encounter flow throughout the design process. Signal-integrity sign-off comes from Cadence's Celtic, SignalStorm and VoltageStorm products.
Meanwhile, Artisan libraries will support Synopsys' scalable polynomial delay model (SPDM) to increase the accuracy and capacity of timing analysis in Synopsys tools. This solution improves modeling of voltage and temperature effects, allowing for capabilities like IR drop analysis and multivoltage design.



