Rank and file don't like C

Rank and file don't like C
Academics, analysts, EDA vendors and corporate engineering managers have all jumped onto the idea that it's time to move to a new language for electronics design. While there are various proposals, industry momentum seems to be swinging behind a C language approach with a standardized C++ class library.

But what about the rank-and-file HDL designers who would presumably use C language design? Early evidence shows that they're not at all impressed.

The E-Mail Synopsys User's Group has lately been peppered with e-mails from designers sounding off against C-language hardware design. Some noted that the idea has been tried before, dating back to the 1970s and 1980s, and didn't work very well then. So why presume it will work now, these designers ask?

"C++ is a cumbersome, complicated language with myriad subtle pitfalls," wrote one designer. He claimed that C++ lets users write invalid programs and has difficulty expressing large structures.

"If I use C/C++ to design my ASIC, how do I simulate it with the same capability I get in ModelSim, where I can trace signals?" asked another.

The more you restrict C/C++, the more it looks like an HDL anyway, wrote another. Several designers suggested other approaches, like Co-Design Automation's Superlog language.

The same topic came up at a panel discussion at the IP99 conference in Edinburgh, Scotland. When an audience of 125 HDL designers was asked how many wanted to move to another language, all but one or two hands quickly came down.

As one observer there noted, VHDL and Verilog designers are in high demand, and their salaries are rising. So why would they want to change?

In the short run, I suspect that C/C++ hardware design will be mostly for systems designers who are already using C. That's the approach being taken by startup EtherDesign, which is aiming its C2HDL language at communications designers who currently use Matlab.

But in the long run, I think HDL designers are going to have to take a closer look at something new, be it C/C++, Java, Rosetta or Superlog.

Think of a world in which an increasing majority of system functionality is expressed in embedded software; synthesis and layout are linked into one process that's run by experts; and the typical hardware designer is forced by complexity to work at a high level and hand off RTL code. That world may well be here in five to 10 years, and those whose career paths extend that far would do well to anticipate it.