StarFabric ready to take on more traffic

There is a need for a more appropriate and evolutionary, rather than revolutionary, solution to the requirements for board designs in such open-platform-based communications equipment as voice-over-Internet Protocol and media gateway, wireless-basestation and broadband loop-carrier offerings. To respond to that need, the PCI Industrial Computer Manufacturing Group six months ago started development on a new board specification.

Now called the PICMG 2.17 StarFabric specification, it is designed to enable a logical progression from today's bus-based systems to higher-performance switched-interconnect architectures. The aim of the PICMG 2.17 subcommittee is to provide an evolutionary path from today's bus-based CompactPCI architecture, embodied in the PICMG 2.x series of specifications, to one based on a multiple-Gigabit switch fabric backplane and chassis-to-chassis interconnect.

The StarFabric switched interconnect solves numerous issues currently facing CompactPCI designers, including system scalability, high availability and support for many traffic types and communication protocols with a single interconnect.

The completed specification will provide designers, manufacturers and integrators with a standard specification for implementing backplanes, boards, PCI mezzanine cards (PMCs), chassis and multichassis combinations that deliver the benefits of the StarFabric switched interconnect in the current CompactPCI environment. With an emphasis on providing an evolutionary path with strong investment protection, the specification provides for the reuse of current CompactPCI line cards and processor cards, as well as the ability to get started with no software changes using existing CompactPCI software, including BIOS, drivers and operating-system support.

The draft specification is in the final stages of development. The required signal-integrity analysis of the specified low-voltage differential-signaling signals across backplanes, boards and connectors is under way and is scheduled to be completed this month.

In parallel with this effort, the members of the subcommittee have been refining the draft PICMG 2.17 specification in preparation for bringing it to ballot in the first quarter of 2002. When approved, the PICMG 2.17 specification will enable system and board developers to realize the many benefits of a multi-Gigabit switched interconnect within the existing PICMG 2.x CompactPCI framework.

The specification is being developed to support a range of system-level implementations, including bus-compatible and busless systems, as well as systems with centralized and distributed star-switch topologies. Bus-compatible systems include both legacy bus segments, such as PCI and H.110, and serial switch-fabric connections on the backplane. Multiple legacy bus segments on the backplane allow reuse of existing line cards and SBCs.

High-density systems utilizing all 21 slots in a standard 19-inch chassis can be developed supporting existing cards. The individual bus segments are interconnected through the switch fabric.

Busless systems completely eliminate buses from the backplane and only run the serial-switch fabric traces between boards. For compatibility with existing silicon, the legacy buses can be maintained on single cards; however, each card is connected to the backplane using one or more serial links. By supporting these two classes of systems, the specification allows for the maximum potential of reusing existing investments while supporting a path to move completely away from legacy buses.

Ethernet/StarFabric mix

The specification also enables compatibility with the Ethernet packet-switched backplane standard developed in PICMG 2.16. That allows the combination of both an Ethernet switched interconnect and a StarFabric switched interconnect in a single system. A number of vendors see the opportunity to build packet timedivision multiplexed (circuit-switched voice) gateway platforms using this type of hybrid system to allow native TDM- and PCI-based control through the StarFabric interconnect and packet aggregation and uplink through the Ethernet interconnect.

PICMG 2.17 supports both centralized switching configurations and distributed switching configurations, where some switching is done on each module and there is no dedicated switch module. Each connection between a node board and a fabric board consists of a StarFabric link with 2.5-Gbit/second bandwidth in each direction. A loaded 19-inch, 21-slot chassis with one fabric board and 20 node boards would support an aggregate bandwidth of 100 Gbits/s.

All traffic between node cards is moved through one or the other of the switch cards. No switching resources are required on the individual node cards, making for an efficient topology for relatively large configurations in standard 19-inch racks. The downside of this type of configuration is that one or two slots must be dedicated to switching, which may not be optimum within a relatively small system.