News & Analysis
MIPS processor
12/3/2001 9:53 AM EST
MIPS processor
With speed grades up to 800 MHz, the SR71000 MIPS processor sports 32 KB each of primary instruction and primary data cache; 512 KB of unified secondarycache; and tertiary cache control, including on-chip tertiary cache tags that can support up to 16 MB of external tertiary cache using commodity SRAMs. The processor's 64-b system interface is fully compatible with existing implementations of the MIPS address and data interface, known as SysAD, operating at an interface bus frequency of up to 133 MHz.
With speed grades up to 800 MHz, the SR71000 MIPS processor sports 32 KB each of primary instruction and primary data cache; 512 KB of unified secondarycache; and tertiary cache control, including on-chip tertiary cache tags that can support up to 16 MB of external tertiary cache using commodity SRAMs. The processor's 64-b system interface is fully compatible with existing implementations of the MIPS address and data interface, known as SysAD, operating at an interface bus frequency of up to 133 MHz.
SandCraft, Inc., www.sandcraft.com.
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