Startup builds Java processor with ARC core

Startup builds Java processor with ARC core
LONDON — A U.K. startup has designed a Java byte code processor around the ARCtangent-A4 32-bit RISC core and claims it achieves better Java performance than ARM's Jazelle at the same clock frequency.

The core, called Bigfoot, complements Digital Communication Technologies Ltd.'s current offering, a Java and C-language CPU based on a stack architecture, known as Lightfoot.

Lightfoot has been available since 1999 as intellectual property suitable for downloading onto an FPGA. Executives at Digital Communication Technologies now expect to have a Bigfoot-based microcontroller in foundry silicon by December, and a Lightfoot microcontroller in January.

However, Digital Communication Technologies does not yet hold a license for the ARCtangent-A4, developed by ARC International plc (Elstree, England). DCT created Bigfoot for Fujitsu Microelectronics Europe GmbH (Dreieich-Buchschlag, Germany) under Fujitsu's ARC license, executives said.

"We're in discussion with ARC on licensing," said Tony Webster, who joined DCT recently as chief executive officer from Infineon Technologies AG (Munich), where he was general manager of the cores division.

DCT (Sunbury, England) has retained the intellectual property around its Java extension to ARC and expects to sell a variety of Java microcontrollers for embedded applications based on both the Bigfoot and Lightfoot cores.

"We've added several thousand gates to the ARC core, thereby Java-enabling it," said Webster, who has joined DCT co-founders Chris Turner, the chief operating officer, and Matt Kubiczek, chief technology officer. "It is more efficient at running Java than Jazelle."

Preliminary benchmarks from DCT show Bigfoot capable of 7 caffeine marks per megahertz, compared with an ARM9-Jazelle score of 5.4, DCT said.

"We augment the ARC instruction set but we don't add a different mode," said Turner. "We change the way the existing instructions work with approximately 5,500 gates to get JIT [just-in-time]-like performance but only a 1.75 average software bloat over byte code."

Because the ARC core is designed for extension it is relatively easy to add instructions in support of Java native processing, turning the ARC core into a Java byte code processor.

"The gate figure [5,500] relates to the version we have coming out shortly with Fujitsu," Turner said. "In this, the bulk of these gates are taken up by the addition of sixteen 32-bit registers that we use for a combined Java stack. There are also around 1,000 gates taken up by modifications to the ARC's internal circuitry-pipeline control and register-addressing logic, for example. A key point to our design is to avoid the mode switching between Java and C that will occur all the time during any Java execution."

Two-level translation

The company uses a two-level translation scheme to map Java Virtual Machine instructions to ARC extension instructions. "Level one does a brain-dead mapping of JVM instructions to ARC extension instructions. Level two is a simple pattern-matching optimizer," Turner said. "In a static environment, this is used as part of the tool chain that builds a system executable. In a dynamic environment it is used during the loading of Java classes; in this sense it is JIT [compiler]-like."

In systems that run under a real-time operating system, the fact that ARC and extended-ARC instructions can be interleaved with no penalty should give improved performance relative to Jazelle, which has an overhead associated with mode switching.

DCT launched in the late 1990s with the Lightfoot core for embedded Java. It is a stack-based core with an 8-bit instruction bus and 32-bit data bus.

The core's stack is eight words deep and its 256 instructions are divided into two halves by the first significant bit: 128 instructions map directly to Java byte codes and 128 instructions can be customized in software to support other instruction sets and those Java instructions that are too abstract for direct implementation.

The 128 extension instructions map to a software file, which is linked in at compilation time. The file is typically used to support C or the Java smart-card system.

"We realized from the start that a Java-only processor had no chance," said Turner. Lightfoot is expected to be well-suited for smart-card-type applications. "We realized that some applications were using a Dhrystone benchmark even though they also wanted Java performance," he said. "That's the area in which Lightfoot can't compete. With Bigfoot we can get the Dhrystone benchmark inherently [from the ARC core]."

Webster said DCT would benefit from the fact that Fujitsu's ARC RISC processor has already been designed into high-volume equipment that customers now wanted to Java-enable. That portends high-volume sales for Bigfoot through Fujitsu, he said.

Along with Jazelle, Bigfoot is also facing a broad set of startup competitors including Zucotto Wireless, InSilicon, Nazomi Communications, Ajile Systems and Chicory Systems, now part of Parthus Technologies plc.