Weighing packaging solutions

For years the IC industry has produced value-added solutions through integration of microelectronics. From the transistor to the fully integrated system-on-chip, there is little doubt or question about the success of integration for the semiconductor industry. There is also little doubt that integration will benefit the commercialization of microelectromechanical systems (MEMS), but questions remain about how this will be paid for and the forms it will take.

MEMS visionaries project a compound annual growth rate in the double digits for the next five years, but to meet these expectations certain barriers to commercialization must be addressed. MEMS have primarily served high-end applications, where advances in front-end processing continue to provide the sexy micrographs from leading institutes, R&D centers and universities around the world.

Until grants from the Defense Advanced Research Projects Agency became available recently, research funding for work on the integration of MEMS and CMOS was seldom available. Related MEMS packaging applications were largely undeveloped.

Thus, integrated MEMS packaging and testing remain major cost barriers to high-volume MEMS solutions, and partitioning, packaging and testing present significant challenges for high-volume MEMS applications. Evaluating the present status of MEMS packaging may answer the question of whether to integrate or partition.

Automotive packaging

Pressure sensors and acceleration sensors have dominated the MEMS automotive market over the past two decades. Low-cost MEMS-based solutions provided the automobile producer with transducers for engine control (like manifold absolute pressure) and safety systems (particularly airbag deployment). These pressure sensors are manufactured with zero (wafer)-level packaging, usually by bonding the sensing silicon structure to a support layer that isolates the parasitic stress from the final package. This standalone device with substrate bonding has been adapted into solutions that today span a broad range of applications, including industrial, consumer electronics, medical and aerospace.

For smart sensing-coupling the sensor with signal conditioning and intelligence-the standalone MEMS device can be packaged alongside a CMOS chip for a hybrid-type solution. The best possible solution can be produced as process considerations for MEMS and CMOS are optimized without sacrifice for individual limitations. That is, a hybrid circuit package will allow the best possible processes for individual components-electronics, mechanics and optics-to be used, then assembled into a final system.

Cost factors

The 50-g accelerometer, for airbag deployment, was one of the first integrated MEMS solutions to reach high-volume production. Here, using standard CMOS processing, the acceleration-sensing elements were formed as microstructures within the CMOS chip. The integration provided a "smart sensor" and was driven by high-volume, low-cost demand. Packaging for this solution became a cost-sensitive priority for manufacturers, since packaging and testing comprised up to 80 percent of the total cost.

Conventional semiconductor packaging would not protect the MEMS device from contamination; in fact, it would destroy the device. The initial solution employed a ceramic package with a protective cap welded in a clean environment. The package became a significant cost factor and an area of focus for profitability. Zero-level wafer packaging with a protective silicon cap would give some relief to the expensive ceramic package.

Today this is a common packaging solution but it is still viewed as a barrier to wide commercialization, because expensive real estate is required for the bond ring-and testing a final singular package with multiple chips doesn't allow for assembly of only known-good dice.

Although "one process does it all" sounds good, for sensors and actuators something will be compromised. Silicon surface micromachining, which forces electronics and micromechanics to be produced from the same process, would cause both to suffer in terms of yield and performance.

What is the desired solution for MEMS? It would be a solution that employs standard CMOS processing, capable of integrating MEMS structures, without the special (costly) need for packaging and testing. As a bonus the solution should employ a completely mainstream semiconductor processing flow. This solution would remove barriers to entry into the MEMS industry.

But be careful: Comparing MEMS with IC processing may not be justified. ICs share a common p-n junction structure; MEMS are diverse, with vastly different materials and applications.

New developments for MEMS encapsulation have been reported at Bosch, IBM and IMEC. Here different techniques have been developed that protect MEMS structures from contamination as encapsulated devices. Developments in low-temperature silicon germanium processing have produced MEMS structures that are fully compatible with CMOS-fabricated devices.

For the first time, MEMS structures have been buried beneath the surface in fully compatible IC process steps. A free-moving resonator structure was buried inside an IC using standard processes and the final device can be packaged using standard semiconductor packaging approaches.

As usual, perhaps economics will decide the direction.

Implied is that MEMS structures can be fully integrated with CMOS with no special packaging required. This will let MEMS be fabricated in standard CMOS factories and packaged using standard packaging technology, which will lead to large-scale adoption of the technology.

The answer to the MEMS integration question will depend on its application. Will scaling of MEMS be advantageous, as seen in the semiconductor industry? Two examples follow: Do you need millions of resonators on a single MEMS chip? No edge here. Is there an advantage to several million micromirrors in a DMD display? Yes, much higher resolution results.

In the end, the barriers to commercialization will be reduced with value-added integration, enabled by encapsulation techniques that provide the use of low-cost, high-volume testing and packaging. This will allow companies that have previously viewed MEMS as incompatible with semiconductors to adopt this exciting technology.

Jim Hermanowski is director of marketing, North America, and Jeff Dumas is international product manager, wafer bonders, at Suss MicroTec Inc. (Waterbury Center, Vt.).