MEMS-IC integration remains a challenge

Integration of microelectromechanical systems with ICs was from the very beginning one of the major attractions of the silicon micromachining technology. Practical implementation of this integration was not easy, however. While the first integrated pressure sensors reached the market in the 1960s, many first MEMS-IC integration efforts failed. It wasn't until the 1980s that the first integrated pressure sensors appeared.

The 1990s brought multiple product launches of integrated MEMS-IC devices, such as acceleration sensors, inkjet print heads and display chips. In the current decade, integrated gyro sensors have entered the market. All those efforts focused on integrating MEMS processes and IC processes on the same wafer. Due to incompatibilities, development cycles were long and expensive.

Major progress was made on the integration front during the venture capital-funded "optical bubble" of 1999-2002. A novel approach of vertical integration of MEMS and IC wafers was introduced, dramatically simplifying the integration of 3-D mirror arrays with VLSI electronics for photonic switches. This approach allowed for independent processing of MEMS and IC wafers, integrating them at the end of the process. While so far only two product families — pressure and gyro sensors — are under development utilizing this optical-bubble learning curve, it is expected that more advanced MEMS products will start benefiting from these technologies in the near future.

Several IC- MEMS process integration approaches have been developed over the last two decades. So far, however, none has emerged as a standardized, easy-to-use process.

Generically, those approaches could be classified as integration of MEMS on top of IC; and lateral (side-by-side) MEMS and IC integration.

The most straightforward method of integration is to build the MEMS device directly on top of the CMOS wafers. This has the severe disadvantage of requiring strict process compatibility. MEMS structures are limited to those that can be surface-micromachined within the CMOS thermal budget (500 deg.C). This rules out low-pressure chemical vapor deposition polysilicon and silicon fusion bonding, a staple for many MEMS devices. Another restriction is that the exposed materials, typically a low-temperature oxide and aluminum, limit the chemistries available for processing.

One of the successful products built with this approach is Texas Instruments Inc.'s display chip DLP. The length of development (17 years) and the amount of money spent ($1 billion) are a good indicator of the difficulty of using this approach. A modification of this approach, IC on top of MEMS, was developed by Sandia National Laboratories, with even more critical process limitations.

The lateral approach overcomes some process incompatibilities between MEMS and CMOS. In this method, any CMOS-incompatible processes are fabricated first. It was used for both bulk and surface micromachining. Analog Devices Inc.'s acceleration sensors adopted this approach. It took them about 10 years to debug the MEMS-IC integration process and design.

Both those integration approaches required a significant process development effort, stretching multiple years and costing hundreds of millions of dollars. They were thus not attractive to startup companies.

The vertical wafer-level MEMS-IC integration approach is based on wafer bonding of two or more wafers, at least one MEMS and at least one CMOS, each fabricated in a dedicated foundry. Compared with the effort of integrating MEMS and active circuitry at the process level, the vertical wafer-level integration of circuits and MEMS has several advantages: It is less restricted by process compatibility, and it does not suffer the real estate penalty and inefficiency of lateral integration techniques.

Because the MEMS and CMOS are fabricated separately prior to integration, the designer has absolute flexibility in the choice of active circuit process options. High-density digital, mixed signal, high voltage, BiCMOS, RF, etc., can all be integrated using the same process steps.

What this provides is an unparalleled opportunity to reduce cost and improve the performance of integrated MEMS devices, including sensors.

The easiest integration can be achieved for electrostatically coupled devices, such as capacitive sensors, as no conductive electrical connection between the IC wafer and MEMS wafer would be necessary. If conductive connections are required, conductive wafer bonding or through-wafer vias technology could be employed.

An additional restriction is that the bonding temperature must remain below the temperature at which metal on CMOS wafers is destroyed (usually under 450 deg.C).

Janusz Bryzek is managing partner at BN Ventures (Fremont, Calif.).

This article represents a much-condensed version of a paper presented at the Sensor Expo Conference in Chicago, June 2003. For access to a fuller version, see planetanalog.com.