High-k strides reopen door to germanium

In the beginning there were bipolar transistors made on germanium wafers, though semiconductor makers quickly switched to silicon as the prime semiconducting material. But now germanium is again on the microelectronics research agenda and is being discussed as a possible replacement for silicon.

Will it happen? Think high-k dielectric.

In the past, the main problem with germanium, besides its limited availability and high cost, was the impossibility of growing a stable oxide on it that could passivate the surface, act as an etch protector and, most important, be used as a high-quality gate insulator. Silicon, on the other hand, gained from the ability to grow silicon dioxide, a material with properties precisely matched to the needs of the semiconductor industry. Add to this the relatively low junction breakdown voltage of germanium, and it is easy to understand why it was soon outshone by silicon as the major semiconducting substrate.

But silicon will soon run into performance limits. On the other hand, germanium has regained considerable attention since it can provide solutions for some of the major roadblocks that silicon technology faces in the development of advanced transistor structures. This is due to germanium's attractive chemical and electrical properties, which can only now be fully exploited because of recent developments in CMOS technology, such as the ability to deposit high-k gate dielectrics.

In particular, the very high mobility of both electrons and holes in the germanium substrate makes the material ideally suited for the formation of high-speed circuits. Here, it is expected to provide improved performance even compared with advanced strained-silicon layers.

Plays well with others

Another advantage of germanium-based CMOS is related to its compatibility with III-V compounds, such as gallium arsenide. This allows adding functionality by combining optical devices, III-V compounds and silicon on the same substrates.

The absence of a stable germanium oxide, previously seen as a major bottleneck for germanium device fabrication, can now be circumvented using high-k dielectrics. They offer an attractive alternative since they allow very aggressive scaling of the equivalent oxide thickness of the gate dielectric. The recent progress made with the deposition of high-k dielectrics on various semiconducting substrates has opened the possibility of using basic materials other than silicon and has pushed germanium once again to the forefront. Of course, it would require a tremendous research effort to produce an appropriate germanium-high-k interface with low electrical defect density.

Nevertheless, germanium will remain expensive, and there will not be enough to support the microelectronics industry with bulk germanium substrates. But this obstacle can be overcome by using thin germanium layers on, for example, a silicon substrate or by using germanium-on-insulator wafers. The latter offer interesting advantages in terms of costs and leakage.

The hurdles

It should be clear that many areas of concern are still unexplored and huge gaps must be bridged before a germanium-chip technology can be created that allows a further miniaturization of conventional chip technologies. A great deal of academic research is needed to gain further insight into the fundamentals of germanium technology. Simultaneously, before germanium CMOS devices can be used as the building blocks for advanced digital CMOS circuitry, major technical challenges have to be investigated. Three are of prime importance.

First, there should be evidence of the higher drive current in short-channel germanium-based transistors (that is, for the sub-45-nm node) compared with that of silicon-based ones. Although the relatively high mobility of charge carriers in long-channel germanium-based transistors has been generally recognized, in short-channel transistors carriers are exposed to high electric fields and the carrier drift velocity depends on the electric field.

Cross-section TEM analysis of a 10nm HfO2 layer, deposited with an atomic layer deposition (ALD) technique on a Germanium surface, showing a uniform and atomically smooth interface. Source: IMEC

Second, a series of process steps should be developed-such as cleaning, surface passivation, gate stack, junction and contact formation, and isolation scheme-that are specifically tuned to germanium material. And from an economic point of view, these process steps or their equipment or both should build on the know-how and practices in current IC manufacturing and equipment.

Third, yield and reliability of the germanium devices must be assessed. This includes the development of defect-free substrates, which will be a major challenge for substrate vendors.

Germanium-based CMOS will be used only in applications where it can be demonstrated that it has a sufficient advantage over other available technologies or where the current technologies are running out of steam. Although it is unclear where germanium will enter the road map, it is expected that it will not happen before the 45-nm node. Possible targets are high-end digital CMOS transistors, including high-speed applications for the telecom market.

But the ability to integrate CMOS circuits on germanium substrates with a wide range of optical and other special devices is expected to open new application areas. The technology will provide circuit and system designers with a broad range of opportunities and could possibly give rise to new, currently unattainable products.

Marc Meuris is director of the IMEC germanium CMOS device program.