OEMs step up demands on net processor suppliers

OEMs step up demands on net processor suppliers
SAN JOSE, Calif. — The market is smaller and the money tighter. But those were only the most obvious changes seen by vendors at the Network Processors Conference this week, in an economy that continues to pummel the data communications industry.

The consensus was that more OEMs are turning to network processing units and other off-the-shelf parts, but they're being much more exacting in what they demand of their suppliers.

The first idea to go: time-to-market. Early NPU efforts were based on the assumption that devices had to get announced and shipped quickly, neglecting questions of how the parts would be programmed or how well they would interact. That philosophy doesn't work anymore, vendors agreed.

"Six months ago, people were willing to do anything for time-to-market," said Tom Riordan, vice president and general manager of the MIPS Processor Division at PMC-Sierra Inc. "Today, they want a total solution, and they're interested in what that solution costs."

In place of rapid delivery, OEMs are asking for package deals. The usability of the software and compatibility with other chips are both important in an NPU these days "The evaluations are more thorough than a year and a half ago, especially on the software side," said Robin Melnick, director of marketing for Applied Micro Circuits Corp.

Besides, competition has reduced bragging rights for being first to market. If AMCC can make its goal of sampling its nP7510 device in December, it has a shot at being the first merchant vendor to ship an OC-192 (10-Gbit/second) network processor — but only "by a matter of weeks," Melnick said.

Proof positive that a chip is real is also necessary. "Before, people wanted to close very quickly and take the risk of working with a company that was 12 months away from silicon. They're not going to do that now," said Eli Fruchter, chief executive officer of EZchip Technologies, based in Migdal Haemek, Israel.

That sentiment was echoed in a plenary speech by Steve Fu, of Cisco Systems Inc.'s office of the CTO. "When you have working silicon, working boards — that's when you can talk to us about design wins," Fu said.

Fu's talk centered on the customer's perspective — an 800-pound customer, considering Cisco is the largest networking company and is actively considering network processors for some products. Cisco joined the Network Processing Forum one month ago, and some Cisco engineers have even formed their own NPU Council, a "loosely coupled group of guys interested in using NPUs," Fu said.

Resetting beliefs

Fu challenged some common beliefs in network processing. One holds that NPUs are preferable to the time and trouble put behind an ASIC. That's wrong on both counts, he said: ASICs aren't always that hard and network processors aren't necessarily that easy.

"ASIC designers have done a good job at parallelizing the complexities of packet processing," he said. On the other hand, "most software engineers are not really used to multithreading and using that to their advantage." One software developer told Fu that only 10 percent of all software designers are up to speed on network processors.

Similarly, Fu said, flexibility doesn't necessarily come with network processors. Software development time often takes too long to add features, wiping out the supposed advantage of NPUs, he said.

Fu noted that designers often complain about the lack of mature development tools for network processors. Another complaint is the lack of headroom to add features without slowing down the devices.

"We really need more headroom," Fu said. "A processor that's classified for OC-48 2.5-Gbit/s interfaces, we're using that for OC-3 155 Mbits/s and OC-12 622 Mbits/s."

Fu also chastised the industry for categorizing network processors by bandwidth — primarily at the OC-48 and OC-192 levels. Bandwidth alone is not descriptive enough, he said, particularly since prices range from $200 to $2,000. Clearly, network processors at different price points are targeted at different market strata, but it can be difficult to see which ones are best-suited for certain tasks, he said.

"We need thorough benchmarks, thorough education, to understand how this market is segmented," Fu said. "There should be a focus on features and services rather than boosting the bandwidth."

Warming to the idea

Cisco is being pulled toward network processors partly because of its acquisitions, many of which are willing to forgo ASICs in building their next-generation boxes, Fu said. But other OEMs are warming to the idea too, largely because staff cuts associated with the economic slump have left them short on designers. "Companies have laid off ASIC teams," said Wade Appelman, vice president of marketing for Vitesse Semiconductor Corp.

Companies that weren't even considering NPUs last year have shown up on the doorstep, said Johan Borje, chief executive officer of the Swedish startup Xelerated Packet Devices (Stockholm). "We have since then been approached by them spontaneously" after being rebuffed 12 months ago, he said.

But David Husak, chief technical officer of C-Port Corp., told an evening panel session that in-house parts have become more formidable competitors for NPUs. While the technology behind network processors has advanced, he said, "the silicon technology that is in-house at our favorite customers has advanced as well." Many companies' ASICs already handle what's called Layer 4 processing — examination of Transmission Control Protocol port numbers, Husak said. "Network processors that can accomplish that feature set at any speed aren't going to be successful products."

Another shift brought on by the weak economy is that large companies have the advantage, many vendors agreed. At the same time, OEMs are expressing doubt about whether the startups can survive. "It takes a long time to develop a stable business," PMC-Sierra's Riordan said. "In the 18 months that we see going forward, it's going to be a very difficult period."

Startups also face the handicap of having fewer avenues to reach potential customers. "How do you get these chips into people's hands? How do you get a distribution channel?" said network-processor analyst John Metz.

For those who do get a foot in the door, the tough economy plus a year of NPU experience has OEMs looking more critically at network processors. Customers make software decisions before choosing silicon, said Kishore Jotwani, vice president of marketing for LVL7 Systems in Cary, N.C. "A year ago, people were saying they had chosen a certain network processor, and asking if our software worked with it. Now, it's a more systems-level approach," he said.

To that end, some companies are beginning to provide systems-minded tools, such as simulators that can model other vendors' chips in a system.

Silicon Access Networks designed its simulator to accept mathematical models of competitors' chips, so OEMs can see how Silicon Access devices interoperate with other ICs. Agere Systems takes a similar approach, allowing XML models of competitors' chips in its Software Development Environment 3.0, announced earlier this week.

Good references

Many companies provide reference designs so OEMs can test-drive an NPU in a system environment. Radlan Inc. offers software expertise to help companies like AMCC build those designs.

But it's still difficult for OEMs to compare network processors side-by-side. "What's admittedly a challenge is that most customers are reluctant to go so far as to get them from five different vendors and invest the time programming each of them," AMCC's Melnick said. That kind of attention is coming only from "the biggest, slowest customers," he said.

Perhaps LVL7 espouses the most ambitious interoperability plan, which aims to provide a common software layer into which all network processors, coprocessors and switch fabrics can tap. Along with the physical-interface standards being developed by the Network Processing Forum, this approach, ideally, would allow for one system design to accept any of several NPUs. But LVL7 or the vendors themselves will have to provide the microcode that links each chip to that common layer.

More Network Processors Conference coverage.