Broadcom's Firepath combines RISC, DSP elements

Broadcom's Firepath combines RISC, DSP elements
SAN JOSE, Calif. — The Firepath processor described by Broadcom Corp. at this week's Embedded Processor Forum exemplifies the variety of architectures now being employed to attack different communications applications.

Firepath combines elements of DSP and RISC processors together with long instruction word (LIW) and single instruction, multiple data (SIMD) parallel processing. The combination of techniques is expected to excel at finite impulse response (FIR) and fast fourier transform (FFT), as found in xDSL applications and elsewhere, according to presenter Sophie Wilson, chief architect at Broadcom's DSL business unit in Cambridge, England.

Wilson described Firepath as a scalable architecture and said that Broadcom is working on a number of implementations. The first is expected to be a system-chip code-named Santorini, which will be paired with a complementary analog front-end chip code-named Opala.

Firepath has two 64-bit RISC datapaths running in parallel, Wilson said. Each datapath includes one-, two-, four-, or eight-way SIMD arithmetic capabilities. Therefore, either a single 64-bit math operation, two 32-bit word operations, four 16-bit or eight 8-bit math operations can be performed in a single cycle on each side of the machine.

With the two pipelines running in lock-step, but not necessarily performing the same operations, Firepath can perform up to sixteen 8-bit data operations in a given cycle.

In a question and answer session after her presentation, Wilson said of math-intensive applications, "SIMD should be a fact of life as soon as you move above 32 bits."

Firepath is targeted at bulk data processing, where large volumes of data are acted upon by the same algorithms repeatedly. The two-slot LIW approach is reflected in the fact that each instruction is constructed in two halves, with the halves referring to the left and right datapaths. Each half is completely independent, and all combinations of elemental half-instructions is allowed.

Specific support is provided for DSP and control code, though Wilson adamantly denied that Firepath is either a DSP or a RISC controller architecture, citing its lack of DSP addressing modes and zero-overhead branches and its unified data memory structure. It does have additional support for Galois field arithmetic.

The use of a simple two-way LIW approach is a boon to compiler writers, as is Firepath's large number of 64-bit width registers, Wilson said.

In fact, a complete C language compiler has been available from Greenhills Software Inc. for some time, Wilson said.

While Firepath is not a DSP architecture, according to Wilson, it has been designed to do DSP-like tasks. Eight 16-bit MACs per cycle provide 7.2 taps per cycle for FIR, and a 256-point complex FFT using the radix-4 algorithm can be performed in 1,290 cycles.

No implementation details were given, and the cycle performance is based on the assumption of large on-chip memory.

Santorini and Opala are expected as the first manifestations of Firepath aimed at a central office DSL application such as a 12-channel DSL modem.

Wilson argued that the SIMD capability is applicable in control functions as well as in datapath processing, and that the two-way LIW approach makes it easy for the compiler to schedule work. "If you can handle two-way superscalarity you can handle this," she said.

No details were presented of target process technologies for Santorini, but Wilson said there was little difference between the clock frequency of Firepath and other processors in a given process technology.

More Embedded Processor Forum coverage.