News & Analysis
Sizing up the contenders
Dylan McGrath
7/27/2009 12:01 AM EDT
Abound Logic Inc.
Executives at this Santa Clara, Calif., company bristle at its being called a startup, insisting that the product Abound Logic (formerly M2000) offers today is based on technology that has been around since 1993.
Upside: Abound Logic's technology has been used by thousands of engineers in Mentor Graphics Corp.'s Veloce emulation family, though many are likely unaware of it. The company claims its SRAM-based Raptor FPGAs offer the industry's highest density, with 750,000 lookup tables (LUTs). Founders Frederic Reblewski and Olivier Lepape are the same pair who founded Meta Systems, which was acquired by Mentor in May 1996 (Mentor is also an investor in Abound Logic). Reblewski and Lepape have been developing FPGAs for 22 years and say the company's 65-nanometer Raptor FPGAs represent the tenth generation of hardware based on their technology.
Downside risk: Abound is competing head to head with Xilinx and Altera in high-end FPGAs. That boldness might serve the company well, but the market leaders are fierce competitors with deep pockets. Xilinx disputes Abound Logic's claim of highest density, saying some of its high-end products offer more logic elements in total (Xilinx uses six-input LUTs, while Abound Logic's have four inputs).
Achronix Semiconductor Corp.
This Cornell University spinoff has raised more than $86 million in venture funding over the past two years and claims to offer the fastest FPGAs on the market.
Upside: The San Jose, Calif., company claims to have dozens of design wins under its belt and says its Speedster FPGAs operate at peak performance of 1.5 GHz, far greater than anything else on the market. As of April, the company was still adding staff and was said to be on pace to exceed its revenue goal, described as "single-digit millions," for the year. Executives emphasize that the company doesn't compete with Xilinx or Altera and say its back-end ACE (Achronix CAD Environment) tools offer familiarity for experienced FPGA designers.
Downside risk: Some question Achronix's "familiar tools" strategy, given the fundamental differences in the company's FPGA architecture. Others say that whether or not Achronix acknowledges the fact, it is indeed competing with Xilinx and Altera in the market for high-end, high-density FPGAs. (Achronix chairman and CEO John Lofton Holt insists the company addresses a market not served by the incumbents, saying, "Some customer boards have an Achronix chip sitting right next to an Altera or Xilinx chip.")
SiliconBlue Technologies Corp.
Based in Santa Clara, this startup has assembled a strong team of programmable logic veterans and raised $40 million in venture capital.
Upside: SiliconBlue is the only company among the current crop of FPGA startups that is targeting handheld consumer devices, where it hopes its low-cost FPGAs can displace ASICs. It claims to offer the first single-chip SRAM/FPGA, the world's lowest-power FPGAs, small form factors and a product that costs $1 per part in high volumes. The company is a favorite of Gartner Inc. analyst Bryan Lewis, who said SiliconBlue is the most intriguing of the FPGA startups. Founder and CEO Kapil Shankar said SiliconBlue is also notching design wins in the red-hot netbook sector, where its offering is used as a companion chip to processors like Intel's Atom and Qualcomm's Snapdragon.
Downside risk: Low-end FPGAs have traditionally been unable to hit the cost and power budget requirements to play in the market for handheld consumer products. Over the years, displacing ASICs with FPGAs has often been easier said than done.
Tabula Inc.
Santa Clara-based Tabula has closed $74 million in funding, but not much is known about its technology or market plans. The company declined an interview request from EE Times because it is in stealth mode. Its Web site says its technology is "a result of a bold rethinking of the entire process of custom hardware design, verification, and production."
Tier Logic
Even less is known about Tier Logic, another Santa Clara startup in stealth mode. Paul Hollingworth, vice president of marketing, told EE Times that the company's products use a 3-D structure but said it is wary of hyping itself until its first products have shipped. Tier has announced Series A funding.
See also: FPGA startups stare down giants and ghosts



