News & Analysis

Reducing system costs

Howard Sachs, Founder, President and CEO, Telairity Semiconductor Inc., Santa Clara, Calif.

6/30/2003 3:50 PM EDT

Reducing system costs

Critics within the industry have suggested that the rising increase in the cost of masks to produce ever-shrinking device geometries is seriously impacting the growth of the ASIC business. Mask costs have indeed been rising and are approaching $1 million. But two other factors are at work. The first is that we can now get many more logic gates on a piece of silicon, which, in fact, means the mask cost per gate is probably going down for the average chip. The other major factor is that the cost of engineering large chips has not been growing at the same rate as mask costs. Companies designing large, complex dice today containing 1 million-plus gates probably spend $10 million to design the chip. This expense has been increasing only as fast as the general cost of living-not nearly as fast as the number of gates per chip is increasing. As a result, the $1 million mask cost is actually a small part of the total chip cost.

Chips contain many more functions due to Moore's Law and, as a result, the number of design starts are down. Let me give you an example. A few years ago, secondary cache memories were always a separate chip; now these memories are always included on the processor chip-two chips are now one. There are many other examples, including the trend to put both microprocessor and DSP cores on the same piece of silicon, and designing chips with several similar-type processor cores, each performing its own set of computational tasks.

The bottom line is that, yes, the cost of manufacturing a silicon wafer-which is dominated by mask costs, but also includes wafer processing and other expenses-is rising as processing nodes shrink. The number of chips per wafer is rising, however, as silicon foundries transition from 200-mm to 300-mm wafers, and this helps offset the rise in processing costs with process node shrinkage. Most importantly, designers are packing more logic (along with memory and analog circuitry) on each chip, meaning that the total cost of manufacture per function is dropping significantly. The total of all these effects is that the actual cost of design and manufacture, per logic function, is dropping. This also translates to a drop per system-level function over time.

Nonrecurring engineering costs do impact the chip industry, however. What is occurring is an upward shift in the volume requirements for a chip to make the design and manufacturing cost of that chip worthwhile and profitable. In the long term, this works well for a consumer-driven chip market, where people are constantly looking for richer feature sets in the devices they purchase. More complete feature sets-cell phones that take and transmit photos, for example-result in higher sales volumes when the economy finally turns around. This translates to an increase in the number of chip designs that have the ability to turn a profit.





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