News & Analysis

TI and UB Video get a jump on H.264 decoding

Junko Yoshida

12/2/2002 11:39 AM EST

TI and UB Video get a jump on H.264 decoding
PARIS — Texas Instruments Inc. and Canadian video codec software company UB Video Inc. this week will show what they say is the first broadcast-quality real-time decoder for the upstart H.264 standard, which promises delivery of Internet Protocol-based video at data rates of less than 1 Mbit/second.

The solution, implemented as an embedded platform based on a 600-MHz digital media processor, will debut in live demonstrations at the BroadbandPlus show in Anaheim, Calif.

The still-evolving H.264 standard is being pitched to service providers and consumer electronics vendors seeking a bandwidth-efficient but high-quality video codec for next-generation digital entertainment services and consumer appliances. Some proponents claim H.264 could jeopardize the anticipated ascendancy of MPEG-4, long assumed to be the logical interactive follow-on to MPEG-2.

Evidence of the spec's appeal has surfaced in recent months as a growing number of companies have outlined rollout plans for H.264 decoders in 2003. They include VideoLocus (Waterloo, Ontario), Heinrich-Hertz-Institut (Berlin), STMicroelectronics (Agrate, Italy), Sand Video (Andover, Mass.), Equator Technologies Inc. (Campbell, Calif.) and Amphion Semiconductor (Belfast, Northern Ireland).

But the partnership between TI and UB Video (Vancouver, British Columbia) it said to be the first that's ready with a real-time decoding scheme for broadcast-quality H.264 Main Profile-based legal bit streams. The solution achieves that feat not with Pentium CPUs but with a single DM642 media processor from TI.

TI is betting the quick move into H.264 silicon will drive its DM642, based on its C64x family of digital signal processors, into video-over-Internet Protocol appliances, DSL video-on-demand set-tops and digital video recorders.

Essential programmability

The partners claim that the DM642 offers the high level of programmability and flexibility required for implementing a spec that remains in flux. Technical changes are still under way within the H.264 standard-development community, said Eric Braddom, worldwide manager for DSP video imaging at TI, so "programmability is essential at this stage."

Further, because of the vast installed infrastructure for MPEG-2-based digital video, set-top box vendors planning to adopt H.264 will likely be expected to offer MPEG-2 decoding capability. Again, the programmability of the DM642 figures to be a benefit here, according to Braddom, who added that the processor implements such set-top-friendly peripherals as three dual-channel video ports, a multichannel audio serial port, a 10/100 Ethernet MAC and 66-MHz PCI.

In relying on a programmable processor, the TI approach contrasts sharply with the path taken by STMicroelectronics, which recently disclosed plans to complete a hardware-based fixed-function H.264 decoder IC for high-definition applications.

Faouzi Kossentini, CEO and president of UB Video, described H.264 as offering "not incremental improvements, but a radical departure in video quality."

The standard, under development by the Joint Video Team of the International Telecommunication Union and the International Standards Organization, marks a departure from the current MPEG-2, MPEG-4 and H.26X video communication standards, integrating new tools and enhancing existing ones to provide what proponents claim is greatly enhanced compression efficiency. The downside is that development of an H.264 video decoder allows for precious little reuse of design elements from previous-generation ICs.

To further complicate matters, H.264 is expected to be offered in three distinct profiles: baseline, main and the code-named Profile X.

Baseline H.264, designed for real-time video communication applications such as videoconferencing and video telephony, implements such error-resilience features as arbitrary slice ordering and redundant slices.

H.264 Main Profile, developed for broadcast applications, uses its own video tools independently of the baseline profile, such as B pictures in several prediction modes, weighted prediction, and adaptive frame and field coding. While some of the broadcast application-specific tools are variations of tools used in MPEG-2 or MPEG-4, the Main Profile's context-adaptive binary arithmetic coding (Cabac) scheme is "a completely new animal," said UB Video's Kossentini.

Meanwhile, Profile X, still in the definition phase, will address streaming and mobile applications, environments where errors occur at a higher-than-normal level of packet loss, Kossentini said. Profile X will take "the error-resilience features already designed for the baseline profile to a new level," he said.

In the joint demonstration at BroadbandPlus, the DM642-based embedded platform will decode standard-definition-quality real-time H.264 Main Profile bit streams at a 1- to 1.5-Mbit/second data rate, offering video resolution equivalent to 3- to 4-Mbit/s MPEG-2 broadcast video, the companies said. Tools shared by H.264's baseline and main profiles include motion prediction, intraprediction, a universal and context-adaptive variable-length coder (UVLC/CAVLC) and a loop-deblocking filter. Although the baseline and main profiles have "about 80 percent" of tools in common, H.264 presents enough complexity to warrant the distinct profiles, Kossentini said. He added that further technical changes to the spec are expected to be on the table at an upcoming Joint Video Team meeting in Japan this month.

Issues that remain to be resolved before H.264 is finalized, according to Kossentini, include which entropy-coding scheme the standard should adopt (UVLC/CAVLC, Cabac or both), how to reduce the decoder's complexity further and how many legal bit streams the standard should allow. The group faces "a classic trade-off issue of complexity vs. compression efficiency," he said.

Far from mature

While he expects the standard to be "technically frozen early next year," Kossentini predicted it may take another "two to three years before H.264 becomes a well-understood, mature standard" to which chip companies feel comfortable designing an ASIC. Using a programmable solution such as the DM642 as an H.264 decoder core and integrating hardware acceleration blocks to handle compute-intensive operations can serve as an interim solution, he said.

Kossentini claimed discussions with potential customers in Japan have revealed that many Japanese consumer electronics companies want to use H.264 decoder chips for high-definition applications, whether the decoder chip is used in a camcorder, set-top box or personal video recorder.

Migrating the DM642-based platform to high-definition applications is "on our road map," said Pradeep Bardia, worldwide marketing manager for TI's DSP video and imaging group.





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