RF technologies span mobile to optical applications

RF technologies span mobile to optical applications
As more consumer devices fill the airwaves with their radio transmissions, currently available frequency bands will inevitably become more congested. The explosion of wireless applications operating in the unlicensed 2.4 GHz ISM bands, for example, will soon see typical home environments pervaded by Bluetooth, IEEE 802.11 and ZigBee devices — all competing for channel space.

New in-home digital networks for audio/video distribution will need to shift to even higher frequencies to meet their bandwidth requirements. RF solutions for this plethora of wirelessly connected consumer products will not only be driven by performance and power consumption requirements, but also by the cost reduction that is essential in high-growth consumer electronics markets.

At the other end of the scale, the need for ubiquitous broadband connectivity is seeing major changes in telecommunications infrastructures. Most mobile telecommunications operators have already upgraded their systems to handle GPRS (General Packet Radio Service) and EDGE (Enhanced Data Rates for Global Evolution) service (2.5G), and are actively preparing themselves for the rollout of 3G (third-generation) systems. Backbone networks are being upgraded to terabit-per-second performance and optical fiber networks are moving into the realm of municipal and wide area networks.

Faced with providing solutions for these RF, microwave and optical networking applications, designers are faced with a bewildering array of semiconductor process technologies to choose from. In applications operating in the 1 GHz to 5 GHz frequency range small-signal functions can effectively be implemented in silicon BiCMOS (Bipolar Complementary MOS), but high power blocks (high-power amplifiers and antenna switches) benefit from the superior max voltage multiplied by cutoff frequency of GaAs (Gallium Arsenide) processes.

RF CMOS starts to play a role for RF systems dealing with "simple" modulations and where ultimate analog performance is not required (mainly short-range radio connections). At frequencies between 5 GHz and 10 GHz, SiGe (Silicon Germanium) now favorably competes with GaAs devices for broadband low-noise amplifiers and high-speed mixed-mode circuitry required by the optical communication industry. Here again, power devices (laser and modulator drivers) still benefit from the better electronic properties of GaAs technologies. Above 10GHz, no commercially available silicon processes can handle any function of optical fiber communication.

Choosing a single semiconductor process technology or the right mix of technologies in which to implement your RF solutions depends not only on the technical performance of specific processes but also on how well those processes can integrate an overall system solution. Most RF process technologies are judged on the performance of their active transistors, with figures such as ft and fmax being commonly used to compare one process against another.

However, the performance of RF circuits depends as much on the passive components in the system as on the active ones. For example, inductor Q-factors are critical to the performance of many RF functions, and the accuracy of impedance matching circuits plays an important part in maintaining performance parameters such as the power-added efficiency of RF power amplifiers.

Size and cost constraints that fuel the need for component reduction (both active and passive) are particularly strong in consumer products, yet even today the RF section of a typical dual-band mobile phone still contains around 100 passive components and several integrated circuits. Tomorrow's mobile phones will not only be dual-band, in all likelihood they will also be dual-mode, for example, being able to operate in both GSM and W-CDMA modes. To reduce the design risk, this will initially require putting two separate RF transceivers in the phone, while continuing to make the phone smaller and lighter at the same time.

One way or another, passive components that currently take up excessive space in the phone will have to be integrated into or alongside the ICs. This also holds for power amplifier stages (using GaAs technologies), usually implemented in modules, the size of which can also be decreased thanks to the integration of passives.

BiCMOS reigns
Currently, the most attractive high-volume manufacturing processes in which this can be achieved are silicon BiCMOS processes. These process technologies typically feature well-characterized and well-modeled bipolar transistors with ft/fmax figures of around 40/80 GHz, giving designers plenty of margin in RF applications up to 5 GHz. They also provide reasonably dense CMOS for control logic and functions such as fractional-N frequency synthesizers.

In the area of passive component performance, thick top-metal layers now permit the integration of high-Q inductors, while the selective deposition of high-k (high dielectric constant) dielectric material allows the integration of metal-metal capacitors with high capacitance per unit area.

The quality-factor of inductors and capacitors used in the RF path depends very much on reducing their losses. Although fabrication in a thick metal layer reduces ohmic losses, the dominant losses in inductors are parasitic capacitance between the inductor coil and the ICs silicon substrate and eddy-current losses in the substrate. Nevertheless, Q-factors as high as 20 at 4 GHz are achievable by careful IC design, coupled with the use of low-k dielectrics and substrate isolation techniques such as deep-trench isolation.

Several process families are usable for RF applications and typical figures of merits are compared. But GaAs processes are no longer necessary for small-signal RF applications operating at frequencies below 3 to 5 GHz. Si BiCMOS processes have matured to match their performance, though the best low-cost solution may be RF CMOS. Source: Philips

Some years ago it was thought the SiGe HBT (Heterojunction Bipolar Transistors) processes would be needed to achieve the transistor performance required in mobile phone applications. However, with shrinking process geometries and development of the deep-trench isolation technology used for silicon BiCMOS processes, silicon has proved that it can perform more than adequately at these L-band frequencies. It is true that SiGe bipolar transistors offers higher ft/fmax figures, and lower noise figures at lower collector current than silicon transistors, but these advantages are normally of little advantage in mobile phone applications.

First, the higher ft/fmax are simply not worth the extra cost. In addition to this, the overall noise contribution derives at least as much from the passive components in the system as from the transistors themselves, making marginal improvements in the transistors' noise figure insignificant.

The only part of the RF system where the performance can be significantly improved by using a non-silicon process technology is the RF high-power amplifier (3W to 4W required in the GSM standard). The characteristics of a SiGe process do not bring much advantage here since higher current handling capability and max voltage are necessary, making GaAs technologies the preferred option for this particular function in the RF path, at least for the GSM standard. Ultimately that may change because next-generation mobile phone systems will transmit at much lower power levels (90% of the transmit time at or below 10 mW antenna power), making a few percentage points improvement in power-added efficiency a much smaller absolute value.

However, III-V semiconductor processes do offer real performance advantages in certain applications where several watts of RF power are required. GSM (Global System for Mobile Communications) is the perfect example of standard requiring such performance. Moreover, the excellent linearity of InGaP/GaAs HBTs make them ideal for use in applications such as CDMA, where the modulation scheme has a strong linearity requirement.

In general, however, GaAs based semiconductor processes are no longer considered necessary for small-signal RF consumer applications operating at frequencies below 3 to 5 GHz. Silicon BiCMOS processes have matured to match their performance, while at the same time offering lower cost and much higher integration levels.

In the longer term, the ultimate low-cost solution may come from RF CMOS process technologies. The CMOS transistors in most RF BiCMOS processes are already characterized for operation at RF frequencies. As a result, one route to RF CMOS is to simply omit the bipolar transistors from the process, while retaining all the passive component integration and substrate isolation capabilities.

Another advantage of this approach is that a great deal of the necessary design experience already exists. However, the "Holy Grail" of RF CMOS is to fabricate it in a baseline CMOS process similar to that currently used for logic-based ICs such as microprocessors, thus making possible the monolithic integration of all the functions of a digital communication system (base band, radio and peripheral circuits). The transistors in 0.18 micron, and certainly in 0.12 micron, baseline CMOS processes are more than capable of operation at frequencies in excess of 2 GHz, while those fabricated in future sub-100 nanometer processes will be capable of much higher frequency operation.

RF transceivers fabricated in baseline CMOS processes are already being investigated for cost-sensitive applications where the RF specification is relatively undemanding, such as the 2.4 GHz BluetoothTM standard. To make Bluetooth wireless technology viable in a wide range of consumer devices, the total cost of the Bluetooth transceiver (RF + base band processing) needs to be brought below $4 (U.S.). To achieve this price level, the ultimate goal is to integrate the base band and RF sections onto the same chip using a low-cost CMOS process. However, putting these two parts in such close proximity on a common substrate creates tremendous problems in trying to prevent electromagnetic interference from one part affecting the other.

Bluetooth RF in CMOS
Nevertheless, several companies have already demonstrated CMOS implementation of a Bluetooth RF section that shares the same chip as a random noise generator (to simulate base band processor activity). Extending RF CMOS to more stringent wireless standards such as GSM would inevitably require the integration of higher quality passive components, pushing up the cost of the process towards existing BiCMOS processes. The GSM power amplifier would anyway require a different (III-V) technology.

For new cellular standards such as the W-CDMA (Wideband Code Division Multiple Access) used in UMTS, it is questionable whether single chip solutions are either achievable or desirable. Unlike GSM, W-CDMA is full-duplex, which means that both the transmit and receive sections need to be active at the same time. Implementing the receive and transmit chains in separate ICs has obvious advantages in reducing the amount of RF energy from the transmitter that spills into the receiver, thereby minimizing cross-talk and interference. However, the integration of the antenna amplifier and the transmit path is possible, thanks to the much lower required output power level, as explained previously in the article.

Such partitioning between ICs is not only done for purely technical reasons. It is also done to give designers flexibility in the way they configure their systems, enabling them to share functional blocks such as LNA (Low-Noise Amplifiers) and mixers between different wireless standards in multi-mode phones, or to use different power amplifier modules with the same basic transceiver design.

Philips' recently introduced dual-mode GSM/UMTS reference design is a first step towards this approach, allowing a single-chip GSM transceiver chip to be added to the 3-chip UMTS solution to produce a dual-mode phone. In this design, the standard 13 MHz or 26 MHz GSM clock is used to generate the 3G reference and also to re-generate the clock for the 3G base band processor.

System partitioning to allow sharing of functional blocks in dual-mode phones can also affect architectural decisions. For example, the use of direct-up mixing to modulate the UMTS transmit carrier also meets the performance requirements for modulating GSM/EDGE transmissions.

By reducing the number of ICs required in the system and eliminating many external passive components, all of these techniques help to significantly reduce pc board area.

In perspective, other exciting technologies are under development that could reduce the size of this entire circuit to even smaller proportions. Integrating the passive components onto silicon using low-cost metal processes, opens up the possibility of creating large-area silicon substrates that can act as carriers for active dies. The passive component substrate and active dies are assembled using direct chip-to-chip bonding techniques. This approach could also allow shifting of passive components off an active die onto the substrate, thereby reducing the size and cost of the IC.

In addition, it would provide a low-cost means of integrating external components such as decoupling capacitors, which currently have to be added as external surface-mount devices. As well as shrinking the entire circuit down to IC proportions, this virtually total level of passive and active component integration reduces the number of solder joints and hence increases reliability. It even promises the ability to be able to mix several different semiconductor processes within the same super-chip package. This technology paves the way to another breakthrough in system integration, opening the door to higher miniaturization required by future communication appliances.