FPGA evolution: new design methods on the horizon

FPGA evolution: new design methods on the horizon
FPGA technology has many advantages over ASIC technology. With field-programmable gate arrays, the user controls the entire design and layout process. Design cycle times are faster, photomask costs are nonexistent and there are no minimum-order restrictions. However, historically, the comparatively low gate densities and high unit costs of FPGAs have relegated them to small, low-volume designs, with ASICs claiming the remainder of the market.

This is no longer the case. Within the last few years, FPGA performance and density have reached the point where these devices are a viable and cost-effective alternative to ASICs for many design starts. Now, FPGA vendors are taking this technology to the next level by developing reconfigurable, system-level FPGAs that contain embedded microprocessor cores, memory and advanced intellectual property. These features provide significant benefits for the designer, such as reduced system development times, improved power consumption, increased volume and expanded board space, as well as the flexibility to make changes right up to production. These dramatic technological breakthroughs do add their own design and verification challenges, however, requiring new and unique design methodologies.

Ten years ago, the size of the average ASIC in production was 10,000 gates, while the largest FPGA was one-tenth that capacity. Today, the average ASIC contains 250,000 gates, while the largest FPGAs double that capacity. Quantities in the range of 1 million to 2 million system gates (the total combination of embedded memory and programmable logic on-chip) are commonly used to describe these top-of-the-range devices.

Performance has also improved. FPGA system clocks run at more than 100 MHz and, through the support of standard interfaces such as low-voltage differential signaling, I/O speeds of over 1 Gbit/second are offered on some of the latest chips. At the same time, the volume cost of FPGAs has continued to fall by around 40 percent per year on a per-function basis.

Leading foundries such as Taiwan Semiconductor Manufacturing Co. and United Microelectronics Corp. use programmable logic to drive the CMOS process technology, thus driving the FPGA's rapid evolution. Today's largest FPGAs might have more than 100 million transistors, all of them inherently matrix-addressable due to the programmable architecture.