This 'engineer's tea' draws thousands

This 'engineer's tea' draws thousands
In the marketing department at a semiconductor plant 20 years ago, I was invited to an "engineer's tea." It was an informal breakfast meeting (Dunkin' Donuts and coffee in a conference room) where engineers discussed some of the circuit-design problems they were having, and the solutions they worked out. To my eyes, it was all transistor-level circuit design.

It was actually quite an honor, I'm told, for a marketing guy to be invited to an engineer's tea, so I avoided commenting on their table manners. The way they attacked the doughnuts (even pulverizing the box) made you wonder whether management's conjecture that engineers should be locked up in a cage and fed through a grill in the door had some truth. But it was fascinating to see engineers-of all imaginable ages, shapes and sizes-take their places on the viewgraph machine, show their circuits and hold their peers' rapt attention.

I was reminded of that scene again this month at the International Solid-State Circuits Conference (ISSCC). This is an engineer-to-engineer event, and, in case you hadn't heard, the action this year was all analog. Never mind fat memories or pipelined processors or DSPs: The most heavily attended sessions-those with 1,000-plus overflow crowds-were all devoted to analog subjects, like oversampling A/D converters, Nyquist samplers and RF CMOS.

The move from bipolar to CMOS circuit design, as one panelist in the RF CMOS discussion reminded, is more than a matter of substituting CMOS transistors for bipolar ones. Bipolar transistors can be biased to affect a linear rise and fall curve. Because of their complementary nature, CMOS transistors more readily slam on and off. Thus, analog functional blocks must be entirely redesigned to transition to CMOS.

Part of the joy of attending ISSCC is watching how clever circuit designers made this transition. The data converter sessions were filled with examples of how the authors accounted for the nonlinearities in digital CMOS.

But what is ISSCC if not a showcase for clever circuit design? The cleverness of a memory IC, for example, is in our ability to make the transistor cell more efficient and get it to talk to a speedy interface.

Audiences here were appreciative. In session after session, I saw the same rapt expressions that I remember at the engineer's tea, but instead of a few dozen, there were literally thousands.