ISSCC: Path to one-chip phone strewn with obstacles

SAN FRANCISCO — As the electronics industry gears up for applications beyond the PC, a debate was brewing at the International Solid-State Circuits Conference here this week about the possibility of crafting a single-chip-mobile phone. With analog RF and communications circuits as two of its main themes, ISSCC found itself wrestling with both the technical and economic hurdles that are keeping such a phone chip elusive.

The number of papers, often outlining the design of key circuits in CMOS, testified to the desire for integration and the problems keeping chip makers from achieving it. Amid the Babel of voices, academics zeroed in on the technical hang-ups while industry engineers fretted over the economic constraints.

Numerous technical problems were attacked piecemeal in a dozen or more papers, but the question of bringing all the solutions together in a common process suitable for single-chip integration remains an open-ended one, particularly for the demanding RF specifications of GSM and code-division multiple-access (CDMA) systems.

An evening panel session on the single-chip radio concluded that even if a cell-phone chip integrating the radio and digital baseband functions becomes technically possible, it is unlikely to be adopted in the foreseeable future for economic reasons. The sticking point: what do you do with the amplifiers and passive components that currently make up the RF front end?

The panel split into those who held that integration was inexorable and a single-chip phone inevitable, and those who saw a host of reasons why integration of the radio section and digital baseband is not compelling.

Michiel Steyaert, a professor at the Katholieke University in Leuven, Belgium, was optimistic, suggesting CMOS could produce a practical single-chip cell phone if the industry would embrace new architectures for tuning and baseband processing. Many such schemes were suggested in ISSCC papers.

But the people building cell phones said integration is far from imminent. Werner Gruber, vice president for new-technology sourcing at Nokia Mobile Phones (Salo, Finland), said he must deliver a $50 phone supporting multiple standards-and customers don't care if it has one chip or many. "Nokia does not believe a single-chip solution is viable for as long as we can see," he said. "It may be technologically here but it will not meet the main driver of our industry: cost."

Ken Hansen, vice president of the technical staff at Motorola's Wireless Integration Technology Center (Austin, Texas), pointed out that there are more than 400 parts in a typical cellular phone, and that as few as 10 of them are ICs. He was hesitant about naming a single technology that could integrate all the divergent requirements of RF components, baseband processors, memories and power-management devices.

Earlier in the day, presenters in the session on "RF and Analog Techniques" explored devices and processes that could unseat gallium-arsenide transistors in cell-phone radio transceivers. The candidates for delivering high-quality-factor passive components included silicon germanium, BiCMOS, CMOS and microelectromechanical systems .

While GaAs FETs are inexpensive and efficient at gigahertz frequencies and cellular handset power levels, they require a split-voltage power supply, a nuisance to cell-phone manufacturers. More significantly, the use of GaAs prevents monolithic integration with silicon. Thus, cell-phone makers are looking for power amplifiers, low-noise amplifiers and mixer-oscillator components that could readily integrate with the CMOS baseband processor.

In this environment, both IBM and Temic are promoting silicon germanium (SiGe).

In a review paper, Seshadri Subbanna, who manages BiCMOS technology research at IBM Microelectronics (Hope-well Junction, N.Y.), described some of the devices his team had built using high-frequency SiGe as the npn heterojunction bipolar transistor within a BiCMOS process. The devices include ECL ring oscillators, 4-bit D/A and A/D converters with 8-GHz sampling rates, frequency dividers and active filters. These parts could be integrated with DSP and CPU cores constructed in CMOS, Subbanna believes.

IBM has designed SiGe devices to compete with the GaAs FETs used in cell-phone front ends, including a 1,900-MHz low-noise transistor and a 1,900-MHz CDMA driver amp. Unlike GaAs, which needs a negative-bias generator, the SiGe devices operate from single-supply voltages. The 1,900-MHz transistor eats 5.5 mA from a 3-V supply; the driver amp takes 20 mA.

Temic Semiconductor GmbH (Heilbronn, Germany), acquired by Atmel Corp. last year, has built a transceiver chip set for Digital Enhanced Cordless Telephones using its bipolar-only SiGe process.

Matthias Bopp, who heads Temic's wireless communications unit, described the two-chip transceiver: RF front end with power amplifier and low-noise amplifier in SiGe bipolar process technology, and DECT transmitter-receiver that includes electronic tuner, demodulator, mixer and baseband filters, in silicon bipolar.

The on-chip synthesizer and voltage-controlled oscillator operate over a 3.6-GHz tuning range with a tuning slope of 60 to 90 MHz per volt. The advantage of the silicon-bipolar process, Bopp pointed out, is its low noise. The phase noise of the transceiver was -90 dB, and its third-order intercept-a measure of its selectivity in a crowded signal environment-was 8 dBm.

But it was the SiGe RF front end that was of most interest to front-end integrationists. Bopp said the process supports spiral inductors, nitride capacitors, polysilicon resistors, as well as 50-ohm matching components.

Five papers in the session explored the use of CMOS in RF devices, often at the key carrier frequencies of mobile telephony.

The most attention-getting was Klaas Bult's analysis of analog broadband circuits in pure digital CMOS. Bult is director of analog and RF microelectronics technology at Broadcom Corp. (Irvine, Calif.), and his paper drew a standing-room-only crowd. Although not addressing the mobile-phone application, it took the form of a tutorial on the issues of analog integration in deep-submicron CMOS, and the impact of scaling geometries and voltages.

Voltage scaling is the major problem for data converters built in digital CMOS. You can build a 10-bit A/D converter in 0.5-micron CMOS that runs on 2.5 V and samples at 100-MHz rates, he told the crowd. But it will not scale, Bult insisted.

Reducing CMOS geometries will trim the voltage margins required to prevent the CMOS FETs from going into saturation. A lower-supply voltage is a problem, since VD,Sat must be large, he said. Otherwise, the speed and accuracy of the circuit is degraded. Noise, crosstalk and overall power dissipation also increase at lower voltage swings, and device pair matching becomes more difficult, Bult said. Analog circuits in 0.35-micron CMOS, using a 3.3-V supply, may not have a problem, since VD,Sat is still around 350 mV. Circuits at 0.25 micron with 2.5-V supplies may be ok too. But at 0.18 micron and 1.7 V, "all circuits get into trouble," Bult said. You don't get the performance you need with a VD,Sat of 150 mV.

The solution may be to use thicker oxides to protect the transistors, and lower input voltage swings. "Look for architectures that decompose speed and accuracy," he advised.

Bult concluded that for broadband communications circuits, "analog integration in deep-submicron CMOS is not only possible but becoming an economic necessity." But that opinion contrasted with the majority view of the evening panel debating the single-chip phone, where most saw a variety of chips in "best-of-breed" process technologies for different functions within multichip modules as the likely way forward.

Indeed, as the debate was opened up to the floor, the integration yea-sayers were challenged to explain how such issues as isolation between digitally generated noise and sensitive RF circuits could be achieved on a single chip.

Said Steyaert, the Katholieke University professor, "We have to attack the problem at several levels: new designs with different topologies, design the digital section so as not to create spurious signals in [the RF] band and so on. It can be done with A/D converters and DSP, so why not with RF?"