Latest reorg roils Motorola's IP, discrete operations

Latest reorg roils Motorola's IP, discrete operations
AUSTIN, Texas — Motorola Inc. is reorganizing its Advanced System Technology Laboratory (ASTL), which was set up only months ago as a repository for the company's intellectual-property cores and as the heart of the company's emerging system-on-a-chip design business. The changes prompted the resignation of Mark McDermott, director of system-on-a-chip (SOC) design technology at the laboratory, who had been charged with developing a cohesive SOC technology strategy for Motorola's $8 billion semiconductor operation.

Moreover, the Semiconductor Products Sector (SPS) seems ready to spin off its grab-bag Semiconductor Components Group (SCG), perhaps into a joint venture with STMicroelectronics (Grenoble, France). With a portfolio of linear, discrete logic and other standard components, SCG doesn't fit in with the market and applications approach put in place by Hector Ruiz, president of the semiconductor operation.

Motorola sent a memo to SCG employees several weeks ago stating that "new business models" were being considered for the group. As of Friday, no final decisions had been made by the group's general manager, Steve Hanson, who recently relocated from Europe to Phoenix, the operations base of SCG.

"Nothing has been decided on. It's a work in progress," said a Motorola executive. "There are several options, and doing a deal with STM is just one of them." Hanson was unavailable for comment.

Also in progress was a renegotiation between Motorola and its outside consulting partners — Mentor Graphics Corp.and Synopsys Inc. — in ASTL. The lab originally was set up as a separate group to service the major groups within the Semiconductor Products Sector, including wireless, networking and computing, and transportation. While Texas Instruments Inc. (Dallas) is said to have moved to a corporate-controlled CAD strategy, Motorola has had "silos" in which product development teams could buy their own EDA tools and develop libraries incompatible with intellectual property (IP) developed in other parts of the company.

Motorola first put out word of its ASTL plans at the Design Automation Conference in early June, when Mentor Graphics included then-Motorolan McDermott on a panel about design for reuse and disclosed that major deals were in the works to develop an IP repository at Motorola.

Then, in July, Motorola formally announced formation of ASTL, headed by veteran executive Arturo Krueger, who was to split his time between Geneva, where he was to run Motorola's European operations, and Austin, where much of the ASTL's work was to have been centered. Krueger is now focused on Europe.

McDermott, who ran Motorola's part of the Somerset Design Center here for joint development of the PowerPC with IBM, briefly served as the technical director for the system-on-a-chip design-methodology work at ASTL. Acknowledged as one of Motorola's best design managers, McDermott — a Corvette aficionado — had developed an approach to the system-on-a-chip problem, code-named Stingray.

Then, after trumpeting ASTL as a central corporate effort, Ruiz decided to keep Krueger in Europe and put Fred Shlapak, a senior vice president in charge of Motorola's wireless subscriber systems group (WSSG), at the helm of ASTL.

McDermott resigned 10 days later. On Sept. 24, Intel announced that it had hired McDermott to set up a Texas design center in Austin.

Two of Shlapak's WSSG managers have taken on ASTL responsibilities: David Mothersole was named director of system architecture and acting director of system-on-a-chip design technology, and Mel Slater was named director of software development.

"Once Motorola decided to move ASTL's functions out to the product groups, I decided to resign and was planning to form my own company," McDermott told EE Times. "Then Intel offered me this position, and I took it."

The move prompted speculation that Intel would hire away many of Motorola's best PowerPC designers at a time when the PowerPC effort is being broadened to telecom and high-end control applications. Albert Yu, senior vice president of Intel in charge of the microprocessor products group, said his company has "nothing like that in mind. Austin is becoming a center for talent, a lot of new things are starting there, and we wanted to tap into the talented engineers coming out of the University of Texas."

Thus far, McDermott's role at Intel is undefined, but Intel itself must figure out how SOC fits in to its processor road map.

Shlapak said Motorola has reconsidered how much of the ASTL work will be done by its outside partners, principally Mentor Graphics, Synopsys and Cadence Design Systems. "We may change the balance of how much is done inside and how much is done outside," he said.

But Shlapak insisted that "the fundamental strategy toward design for reuse has not changed, and there is no downsizing of ASTL. None. None whatsoever."

What has changed is how ASTL will get to the goal of a corporate-wide design methodology, a change that might be described as learn-as-you-go. Because WSSG must integrate the controllers, digital signal processors and other components into wireless-phone chip sets, it makes sense to run the corporate SOC effort under the auspices of the wireless group, Shlapak said.

"A year and a half ago, we recognized that the Semiconductor Products Sector had tremendous amounts of IP, but there were different architectures. How to take all of that IP and make it available to all of the product organizations is why we set up ASTL. And keep in mind, this is a transformation that every company is facing. How to get reusable technology is not something a company can do overnight," Shlapak said.

One part of Motorola's "re-think" has involved whether it has the resources to go back and reconfigure existing cores so that they can be added to a central IP library. More fundamentally, Motorola decided that ASTL had to take on a more practical role, complementing the real-world design efforts instead of functioning as a central R&D arm.

Synopsys chairman Aart de Geus emerged from a meeting here this past week with Shlapak and said later, in a telephone interview, that the shifts at Motorola are similar to what other companies are undergoing as they search for a workable design-for-reuse methodology.

"Fred [Shlapak] is a guy who likes to drive toward the bottom-line results, and we are on the same wavelength," de Geus said. "What we have found at Synopsys is that it is best to focus on real projects, where the deliverables prove that it's feasible to use these design techniques to get results."

Mothersole, who has taken over McDermott's role on an acting basis, said Motorola's EDA spending with Mentor, Synopsys and others will increase this year. "We will spend twice as much this year on design methodology as last year," he said.

According to one source within Motorola, Ruiz put ASTL under Shlapak and WSSG partly as a way to limit the number of his direct reports. Similarly, the Advanced Process Development Laboratory was put under the Networking and Computer Systems Group, headed by Bertrand Cambou.

Because that group needs early access to the highest-performance process technology, moving the advanced process lab to Cambou's organization made sense, one manager said.