Optimizing Digital Signal and Image Processing on Intel Architecture Processors

This paper examines the most important factors affecting DSP performance on Intel Architecture-based processors and explains how the performance of an innovative radar post-processing algorithm was increased up to 33X by multi-threading and using COTS multi-core hardware and performance libraries. It also discusses the new ability to tightly couple FPGAs to Intel processors and summarizes new instructions and micro architecture that will roughly double the performance of many DSP algorithms on Intel processors that will release in 2010.