Tech Papers

Optimizing Memory Bandwidth in Complex SoCs

Sonics
Drew Wingard

White Paper

February 2010

External URL
High-end System-on-Chip (SoC) architectures consist of tens of processing engines. These processing engines have varied traffic profiles consisting of priority traffic requiring that the latency of the traffic is minimized, controlled bandwidth traffic that requires low service jitter on the throughput, and best effort traffic that can tolerate highly variable service. This paper discusses the trade-off between multi-threaded non-blocking (MTNB) flow-control and single threaded tag (STT) based flow-control in the realm of Open Core Protocol (OCP) specifications. Sonics argues that the non-blocking multi-threaded flow-control protocol is more suitable for latency minimization of the priority traffic and jitter minimization of controlled bandwidth traffic, when compared with a single threaded tag (STT) based protocol.




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