TLM Peripheral Modeling for Platform-Driven ESL Design

This paper provides an overview of a SystemC-based Transaction Level Modeling (TLM) methodology for the rapid creation of system-on-a-chip (SoC) platform models. A brief overview of Electronic System Level (ESL) design tasks and corresponding modeling requirements is given, and the main topic, a methodology for the efficient creation of transaction-level peripheral models, is discussed in detail.